US 2007/0168766 A1Published application

Providing precise timing control between multiple standardized test instrumentation chassis

AssigneeAdvantest Corporation

InventorsAnthony Le, Glen Gomes

Life of this patent

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Abstract

Precise timing control across multiple standardized chassis such as PXI is obtained by providing several control signals over PXI_LOCAL within each chassis, and by providing these control signals to other chassis. A Least Common Multiple (LCM) signal enables all clocks to have coincident clock edges occurring at every LCM edge. A start sequence allows all PXI expansion cards in the test system to start at the same time. A MATCH line enables pincard modules to check for expected DUT outputs and either continue execution of their local test programs or loop back and repeat a section of the local test program in accordance with the result of the DUT output check. An End Of Test (EOT) line enables any one pincard module to abruptly end the local test programs running in all other pincard modules if an error is detected by the local test program in the pincard module.

Claims22

Dependent claims

A system for providing precise timing control between circuit cards in a multi-chassis system, comprising:

a plurality of chassis conforming to a standardized specification, the plurality of chassis including a master chassis and one or more slave chassis, each chassis including specification-compliant slots and a backplane of a same design version for providing electrical connections between circuit cards coupled to the slots;
a specification-compliant master star trigger card couplable to one of the slots in the master chassis for providing a reference clock and non-specification control signals to other specification-compliant circuit cards coupled to other slots in the master chassis over pre-existing specification-compliant matched-length reference clock traces and a bus on the backplane that is user-configurable according to the specification, respectively, and for providing the reference clock and non-specification control signals to the one or more slave chassis over matched-length cabling external to the chassis;
a specification-compliant slave star trigger card couplable to one of the slots in each slave chassis for receiving the reference clock and non-specification control signals from the master star trigger card and providing the reference clock and non-specification control signals to other specification-compliant circuit cards coupled to other slots in the slave chassis over the pre-existing specification-compliant matched-length reference clock traces and the bus on the backplane that is user-configurable according to the specification, respectively;
and
one or more specification-compliant circuit cards couplable to slots in each of the plurality of chassis for receiving the reference clock and the non-specification control signals at about the same time and operating with precise timing control in accordance with the reference clock and control signals.

2 more elements

A method for providing precise timing control between circuit cards coupled to specification-compliant slots in a plurality of chassis conforming to a standardized specification, the plurality of chassis including a master chassis and one or more slave chassis, each chassis including a backplane of a same design version for providing electrical connections between circuit cards coupled to the slots, the method comprising:

utilizing matched-length cabling external to the chassis to provide a reference clock and non-specification control signals from a specification-compliant master star trigger card coupled to the master chassis to a specification-compliant slave star trigger card in each of the one or more slave chassis;
utilizing pre-existing specification-compliant matched-length reference clock traces on the backplane of each chassis to provide the reference clock from the master or slave star trigger card to specification-compliant circuit cards coupled to slots in that chassis;
utilizing a pre-existing bus on the backplane of each chassis that is user-configurable according to the specification to provide one or more non-specification control signals from the master or slave star trigger card to the specification-compliant circuit cards coupled to slots in that chassis;
and
receiving the reference clock and the one or more non-specification control signals at the specification-compliant circuit cards and master and slave star trigger cards in each chassis at about the same time to allow the star trigger cards and circuit cards to operate with precise timing control in accordance with the reference clock and control signals.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 11/196,873Filed 3 Aug 2005
Published: 19 Jul 2007
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

G01R 31/31715
Input or output aspects: testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of…
G01R 31/31716
Input or output aspects: testing of input or output with loop-back
G01R 31/31717
Input or output aspects: interconnect testing
G01R 31/31726
Timing aspects, e.g. clock distribution, skew, propagation delay: synchronization, e.g. of test, clock or strobe signals; Signals in different…