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US 2007/0168712 A1Published application
Method and apparatus for lockstep processing on a fixed-latency interconnect
AssigneeIntel Corporation
InventorsPaul Racunas, Matthew Mattina, George Chrysos, Shubhendu Mukherjee
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Abstract
Methods of operating two or more devices in lockstep by generating requests at each device, comparing the requests, and forwarding matching requests to a servicing node are described and claimed. A redundant execution system using the methods is also described and claimed.
Claims22
A method comprising:
- generating a first request;
- receiving a second request;
- comparing the first request to the second request;
- and
- if the first request matches the second request, sending a merged request.
2 more elements
A method comprising:
- receiving a message from a node on a communication network;
- allocating a buffer to hold an acknowledgement;
- sending the message to one of a plurality of devices;
- receiving an acknowledgement from the one of the plurality of devices;
- and
- processing the message.
3 more elements
A method comprising:
- receiving a message from one of a plurality of devices;
- sending an acknowledgement to the one of the plurality of devices over a known-latency communication medium;
- waiting a predetermined period of time;
- and
- processing the message.
2 more elements
A processor comprising:
- an interconnection network;
- a plurality of processor cores connected to the network, wherein a first core is to operate in lockstep with a second core;
- a device connected to the network;
- mapping logic to determine relative positions of the first core, the second core and the device on the network and to identify which of the first and second cores is closer to the device and which is farther from the device;
- request logic to coordinate requests from the first and second cores to the device;
- and
- response logic to coordinate responses from the device to the first and second cores.
4 more elements
A system comprising:
- a plurality of central processing units (“CPUs”);
- a memory;
- and
- a network to carry data between the CPUs and the memory;
- wherein
- a message from the memory is to arrive at a first CPU through the network;
- the first CPU is to send the message to a second CPUs through the network;
- the second CPU is to send an acknowledgement to the first CPU through the network;
- and
- the second CPU is to begin processing the message a predetermined period of time after sending the acknowledgement.
7 more elements
Dependencies are inferred from the claim text.