Multi-processor system and program for causing computer to execute controlling method of interruption of multi-processor system
AssigneeSeiko Epson Corporation
InventorsAkinari Todoroki, Katsuya Tanaka
Life of this patent
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AssigneeSeiko Epson Corporation
InventorsAkinari Todoroki, Katsuya Tanaka
Estimating the term…
A multi-processor system with a plurality of unit processors includes: a semaphore setting section for setting semaphores representing preferential right to the competing of resources to be able to be identified to correspond to each of a plurality of the resources; a semaphore request determining section for determining, whether when a first unit processor among said unit processors requests to obtain a semaphore that is set to said semaphore setting section, the request is for requesting a semaphore being obtained by the second unit processor; and an exclusive controlling section for making the request by the first unit processor wait when it is determined that said request is for requesting a semaphore being obtained, and permitting to obtain the requested semaphore when it is determined that said request is for requesting a semaphore other than the semaphore being obtained by the semaphore request determining section.
A multi-processor system with a plurality of unit processors, comprising:
A program for causing a computer to execute a controlling method of an interruption of the multi-processor system to be applied to the multi-processor system with a plurality of unit processors, comprising:
Dependencies are inferred from the claim text.