Selective electroless-plated copper metallization

A method for forming unsupported metal lines, comprising:

• depositing a first seed layer including a thin film of Copper (Cu) having a thickness of less than 5 nanometers (nm) on a substrate;
• depositing a first patterned photoresist layer having a first thickness over the seed layer defining a number of openings to the seed layer;
• depositing a first layer of copper having the first thickness contacting the seed layer using electroless plating;
• depositing a second seed layer on the first layer of copper and the first patterned photoresist;
• depositing a second patterned photoresist layer having a second thickness over the second seed layer defining a number of openings to the second seed layer;
• depositing a second layer of copper having the second thickness contacting the second seed layer using electroless plating;
• and
• removing the first and second photoresist layers and the first and second seed layers in a single operation using an oxygen plasma process, leaving the first and second layers of copper unsupported to form air bridges.

A method for forming vertical copper studs and a first horizontal metal layer, comprising:

• depositing a porous first seed layer including palladium on a substrate;
• depositing a first patterned photoresist layer defining a first number of holes contacting the first seed layer;
• forming a first layer of vertical copper studs using electroless plating, wherein the electroless plating includes filling the first number of holes to a top surface of the first patterned photoresist layer;
• depositing a porous second seed layer including palladium on the first layer of copper vias and the top surface of the first patterned photoresist layer;
• depositing a second patterned photoresist layer defining a second number of horizontal conductor line openings above the second seed layer;
• and
• forming a second layer of copper using electroless plating using electroless plating, including filling the second number of horizontal conductor line openings to a top surface of the second patterned photoresist layer.

A method for forming a multilayer copper wiring structure, comprising:

• depositing a first seed layer on a substrate;
• forming a first photoresist layer defining a first number of openings to the first seed layer;
• forming a first level of vertical copper lines in the first number of openings;
• depositing a second seed layer on the first level of copper and first photoresist layer;
• forming a second photoresist layer defining a second number of openings to the second seed layer;
• forming a first level of substantially horizontal conductor lines in the second number of conductor line openings;
• depositing a third seed layer on the first level of conductor lines and the second photoresist layer;
• forming a third photoresist layer defining a third number of openings to the third seed layer;
• forming a second level of vertical copper lines in the third number of openings;
• depositing a fourth seed layer on the second level of vertical copper lines and third photoresist layer;
• forming a fourth photoresist layer over the fourth seed layer to define a fourth number of openings to the fourth seed layer;
• and
• forming a second level of substantially horizontal conductor lines in the fourth number of conductor line openings.

A method of forming an integrated circuit, comprising:

• forming at least one transistor on a top surface of a semiconductor substrate;
• forming a patterned insulator layer having a predetermined vertical thickness overlaying the at least one transistor having openings to access selected portions of the at least one transistor;
• forming a first porous seed layer covering the patterned insulator layer and the selected portions of the at least one transistor;
• forming a first patterned photoresist layer having a predetermined vertical thickness exposing at least portions of the first porous seed layer and the selected portions of the at least one transistor;
• forming a first level of conductive material on the selected portion of the first seed layer, the first level of conductive material extending above the predetermined vertical thickness of the patterned insulator layer, and the predetermined vertical thickness of the first patterned photoresist layer by a selected amount;
• forming a second seed layer covering at least a top surface of the first level of conductive material and at least a portion of the first patterned photoresist layer;
• forming a second patterned photoresist layer;
• forming a second level of conductive material covering at least a portion of the top surface of the first level of conductive material, and not contacting any portion of the patterned insulator layer;
• forming a third porous seed layer covering at least a top surface of the second level of conductive material and at least a portion of the second patterned photoresist layer;
• forming a third patterned photoresist layer;
• forming a third level of conductive material covering at least a portion of the top surface of the second level of conductive material, and not contacting any portion of the patterned insulator layer or the first conductive layer;
• forming a fourth porous seed layer covering at least a top surface of the third level of conductive material;
• forming a fourth patterned photoresist layer;
• forming a fourth level of conductive material covering at least a portion of the top surface of the third level of conductive material, and not contacting any portion of the patterned insulator layer, the first conductive layer, or the second conductive layer;
• removing the first, second, third and fourth photoresist layers;
• removing the first, second, third and fourth seed layers;
• and
• forming a diffusion barrier on at least some of exposed surfaces of the first, second, third and fourth levels of conductive materials.