Methods for forming uniform lithographic features
AssigneeInternational Business Machines Corporation
InventorsToshiharu Furukawa, Mark Hakey, Steven Holmes, David Horak, Charles Koburger, Chung Lam
Life of this patent
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Abstract
Methods for fabricating a semiconductor device include forming a first layer on an underlying layer, forming a hardmask on the first layer, and patterning holes through the hardmask and first layer. An overhang is formed extending over sides of the holes. A conformal layer is deposited over the overhang and in the holes until the conformal layer closes off the holes to form a void/seam in each hole. The void/seam in each hole is exposed by etching back a top surface. The void/seam in each hole is extended to the underlying layer.
Claims20
A method for fabricating a semiconductor device, comprising:
- forming a first layer on an underlying layer;
- forming a hardmask on the first layer;
- patterning holes through the hardmask and first layer;
- forming an overhang extending over sides of the holes;
- depositing a conformal layer over the overhang and in the holes until the conformal layer closes off the holes to form a void/seam in each hole;
- exposing the void/seam in each hole by etching-back a top surface;
- and
- extending the void/seam in each hole to the underlying layer.
A method for fabricating a semiconductor device having uniform sized sub-lithographic features, comprising:
- forming a first layer on an underlying layer;
- forming a hardmask on the first layer;
- patterning holes having different sizes due to tolerances through the hardmask and first layer;
- forming an overhang extending over sides of the holes by etching the first layer to expand the holes in the first layer such that the hardmask layer forms the overhang over the holes;
- depositing a conformal layer over the overhang and in the holes until the conformal layer closes off a top of the holes to form a void/seam in each hole having a sub-lithographic dimension;
- exposing the void/seam in each hole by etching back a top surface;
- and
- extending the void/seam in each hole to the underlying layer to provide a sub-lithographic sized hole.
A method for fabricating a semiconductor device having uniform sized sub-lithographic features, comprising:
- forming a first layer on an underlying layer;
- forming a hardmask on the first layer;
- patterning holes through the hardmask and first layer;
- forming an overhang extending over sides of the holes by selectively depositing a material to form the overhang;
- depositing a conformal layer over the overhang and in the holes until the conformal layer closes off the holes to form a void/seam in each hole;
- exposing the void/seam in each hole by etching back a top surface;
- and
- extending the void/seam in each hole to the underlying layer.
A method for fabricating a semiconductor device having uniform sized sub-lithographic features, comprising:
- forming a first layer on an underlying layer;
- patterning holes through the first layer;
- forming spacers on sides of the holes;
- selectively depositing a material on the first layer other than on the spacers to form an overhang over the holes using the selectively deposited material;
- removing the spacers;
- depositing a conformal layer over the overhang and in the holes until the conformal layer closes off a top of the holes to form a void/seam in each hole;
- exposing the void/seam in each hole by etching back a top surface;
- and
- extending the void/seam in each hole to the underlying layer.
Dependencies are inferred from the claim text.