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US 2007/0166976 A1Published application
Method of fabricating a semiconductor device
AssigneeDongbu HiTek Co., Ltd.
InventorJung Hak Myung
Life of this patent
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Abstract
Embodiments relate to a method of fabricating a semiconductor device. In embodiments, a gate pattern may be formed on a semiconductor substrate, and sidewalls having a lower height than a height of the gate pattern may be formed at both sides of the gate pattern using a photoresist pattern. A silicide layer may be formed on exposed upper surface and side surfaces of the gate pattern and a portion of the semiconductor substrate at both sides of the sidewalls. Therefore, the silicide layer formed on a gate may be enlarged, and may reduce gate resistance.
Claims20
A method comprising:
- forming a gate electrode over a semiconductor substrate;
- forming an insulating layer over the semiconductor substrate including the gate electrode;
- forming height differences in portions of the insulating layer over edge areas of the gate electrode;
- etching the insulating layer with the height differences to form sidewalls at both sides of the gate electrode;
- and
- forming a silicide layer over the gate electrode and a portion of the semiconductor substrate at both sides of the sidewalls.
3 more elements
A device, comprising:
- a semiconductor substrate;
- a gate electrode formed over the semiconductor substrate;
- an oxide layer having a height lower than a height of the gate electrode at sides of the gate electrode;
- a sidewall formed over the oxide layer;
- and
- a silicide layer covering a top surface of the gate electrode and a portion of a side surface of the gate electrode.
3 more elements
A device comprising:
- a gate electrode having first height formed on a semiconductor substrate;
- sidewalls having a second height formed on the semiconductor substrate adjacent to the gate;
- a silicide layer formed on a top surface of the gate electrode and at least a portion of a top surface of the sidewalls.
Dependencies are inferred from the claim text.