Method for removing metal foot during high-k dielectric/metal gate etching

A method for etching a metal gate electrode, comprising:

• providing a substrate for forming a semiconductor device;
• forming a first dielectric layer over the substrate;
• forming a first metallic layer over the first dielectric layer;
• forming a patterned polysilicon layer having a sidewall surface over the first metallic layer;
• forming a sidewall dielectric layer on the sidewall surface of the patterned polysilicon layer;
• and
• applying an angled etch process to etch the first metallic layer using the patterned polysilicon layer and sidewall dielectric layer for alignment to obtain an etched metal gate electrode having a substantially vertical sidewall.

A method of forming metal gates in semiconductor device, comprising:

• patterning and etching a polysilicon layer down to an underlying metallic layer to form an etched polysilicon structure having a sidewall surface on which is formed a polymer layer;
• etching the polymer layer from the sidewall surface of the etched polysilicon structure to expose an additional surface area of the underlying metallic layer;
• forming a thin nonconductive coating on the sidewall surface of the etched polysilicon structure;
• and
• etching the underlying metallic layer with a charge prone plasma that charges the thin nonconductive coating to establish a localized electric field which directionalizes ions in the plasma to etch corner edges of the underlying metallic layer, thereby forming a metal gate having an etched metallic layer with vertical sidewalls.