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US 2007/0166971 A1Published application
Manufacturing of silicon structures smaller than optical resolution limits
AssigneeAtmel Corporation
InventorBohumil Lojek
Life of this patent
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AssigneeAtmel Corporation
InventorBohumil Lojek
Estimating the term…
Method for forming silicon structures, such as upright gates or fins on a wafer substrate, particularly for use as a building block for semiconductor devices. The structures are smaller than can be resolved by conventional optical lithography. A plan of the area-wise dimensions of the fin or gate structure is mapped to a substrate as an ideal, Conductive and insulative layers are deposited onto the substrate and a work region that includes the desired structure is designed by photolithography. An opening is etched in the work region and a frame is created protective of the desired structure. Most of the frame is etched away except over the structure and then this portion is used to protect the structure so that remaining material can be removed until only the gate over the substrate remains. This process is carried out in many places over a wafer with the structures preferably aligned in rows and columns for making memory or logic arrays.
The method of making a microminiature structure on a planar substrate comprising:
The method of claim 3 wherein the rectangular frame is defined by etching an opening in said mask.
A method of making a microminiature structure on a planar substrate comprising:
The method of claim 9 wherein said substrate is a silicon wafer with an insulative coating.
The method of clam 10 wherein the first layer is a conductive layer.
The method of claim 10 wherein the first layer is a polysilicon one layer.
The method of making polysilicon fins arrays on a wafer substrate comprising;
Dependencies are inferred from the claim text.