Pre-amorphization implantation process and salicide process
OwnerPo-Chao Tsao, Yi-Yiing Chiang +4inventors
InventorsPo-Chao Tsao, Yi-Yiing Chiang, Chang-Chi Huang, Hsin-Hui Hsu, Ming-Tsung Chen, Chien-Ting Lin
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Abstract
A salicide process is described, wherein a substrate with an NMOS transistor and a PMOS transistor thereon is provided. A mask layer is formed over the substrate covering the PMOS transistor but exposing the NMOS transistor, and then a pre-amorphization implantation (PAI) step is conducted to the substrate using the mask layer as a mask. After the mask layer is removed, a salicide layer is formed on the NMOS transistor and the PMOS transistor.
Claims13
A self-aligned silicide (salicide) process, comprising:
- providing a substrate with an NMOS transistor and a PMOS transistor thereon;
- forming a mask layer over the substrate covering the PMOS transistor but exposing the NMOS transistor;
- performing a pre-amorphization implantation (PAI) step to the substrate using the mask layer as a mask;
- removing the mask layer;
- and
- forming a salicide layer on the NMOS transistor and the PMOS transistor.
A selective pre-amorphization implantation (PAI) process, comprising:
- providing a substrate with an NMOS transistor and a PMOS transistor thereon;
- forming a mask layer over the substrate covering the PMOS transistor but exposing the NMOS transistor;
- and
- performing an amorphization implantation step to the substrate using the mask layer as a mask.
Dependencies are inferred from the claim text.