Methods of Forming Field Effect Transistors and Capacitor-Free Dynamic Random Access Memory Cells
AssigneeSamsung Electronics Co., Ltd.
InventorsKi-whan Song, Chang-kyun Kim
Life of this patent
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Abstract
Methods of forming capacitor-free DRAM cells include forming a field effect transistor by forming a first semiconductor wafer having a channel region protrusion extending therefrom and surrounding the channel region protrusion by an electrical isolation region. A portion of a backside of the first semiconductor wafer is then removed to define a semiconductor layer having a primary surface extending opposite the channel region protrusion and the electrical isolation region. A gate electrode is formed on the primary surface. The gate electrode extends opposite the channel region protrusion. The source and drain regions are formed in the semiconductor layer, on opposite sides of the gate electrode.
Claims18
A method of forming a field effect transistor, comprising:
- forming a first semiconductor wafer having a channel region protrusion extending therefrom that is surrounded by an electrical isolation region;
- removing a portion of a backside of the first semiconductor wafer to define a semiconductor layer having a primary surface extending opposite the channel region protrusion and the electrical isolation region;
- forming a gate electrode extending opposite the channel region protrusion, on the primary surface;
- and
- forming source and drain regions of first conductivity type in the semiconductor layer, on opposite sides of the gate electrode.
A method of forming a capacitor-free dynamic random access memory cell, comprising:
- implanting hydrogen and/or inert atoms from Group 0 of the periodic table into a front side of a first semiconductor wafer to define a buried implant layer therein;
- forming a first electrically insulating layer pattern on the front side of the semiconductor wafer;
- selectively etching the front side of the semiconductor wafer to define a channel region protrusion extending therefrom, using the first electrically insulating pattern as an etching mask;
- depositing a second electrically insulating layer on sidewalls of the channel region protrusion;
- planarizing the second electrically insulating layer to thereby define an electrical isolation region surrounding the channel region protrusion;
- bonding a second semiconductor wafer on a planarized surface of the electrical isolation region;
- delaminating a portion of the backside of the first semiconductor wafer to define a semiconductor layer having a primary surface extending opposite the channel region protrusion and the electrical isolation region;
- forming a gate electrode extending opposite the channel region protrusion, on the primary surface;
- and
- forming source and drain regions of first conductivity type in the semiconductor layer, on opposite sides of the gate electrode.
A method of forming a capacitor-free dynamic random access memory cell, comprising:
- implanting hydrogen and/or inert atoms from Group 0 of the periodic table into a front side of a first semiconductor wafer to define a buried implant layer therein;
- forming an electrically insulating layer on the front side of the semiconductor wafer;
- bonding a second semiconductor wafer on the electrically insulating layer;
- delaminating a portion of a backside of the first semiconductor wafer along the buried implant layer, to thereby define a semiconductor layer on the second semiconductor wafer;
- and
- forming a transistor of a capacitor-free DRAM cell in the semiconductor layer.
Dependencies are inferred from the claim text.