Semiconductor device structure and methods of manufacturing the same

A method of fabricating a semiconductor wafer having at least one integrated circuit, comprising:

• forming a plurality of active conductive features on a surface of a substrate of the semiconductor wafer, each of the active conductive features being surrounded by a boundary area, wherein adjacent boundary areas are separated by an open area;
• determining a target pattern density for the surface of the substrate;
• forming a plurality of dummy structures on the surface of the semiconductor in the open area, wherein the dummy structures and the active conductor traces achieving the target pattern density over the surface of the substrate;
• and
• polishing the surface, whereby the dummy structures cooperate with the active conductive features to improve planarization of the surface.

A system of generating a layout for a semiconductor device array, comprising:

• an interface receiving a first layout comprising an active conductive feature, a boundary area surrounding the active conductive feature, and an open area other than the active conductive feature and the boundary area;
• a database storing a plurality of dummy templates of different pattern densities, each of which comprises a plurality of dummy seeds;
• and
• a processor generating a second layout by adding the dummy seeds on the open area according to at least one of the dummy templates.