Method for performing a burn-in test
AssigneesInternational Business Machines Corporation, Infineon Technologies AG
InventorsAlan Norris, Samuel Weinstein, Stephen Wuensche
Life of this patent
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Abstract
A DDR DRAM having a test mode and an operational mode and a method for testing the DDR DRAM. The method includes in the order recited: (a) placing the DDR DRAM in test mode; (b) issuing a bank activate command to select and bring up a wordline selected for write of the DDR DRAM; (c) writing with auto-precharge, a test pattern to cells of the DDR DRAM; (d) repeating steps (b) and (c) until all wordlines for write have been selected; (e) issuing a bank activate command to select and bring up a wordline selected for read of the DDR DRAM; (f) reading with auto-precharge, the stored test pattern from cells of the DDR DRAM; and (g) repeating steps (e) and (f) until all wordlines for read have been selected.
Claims7
A DDR DRAM having a low frequency and a high frequency operating mode, comprising:
- a multiplicity of storage cells arranged in an array, each storage cell accessible by a wordline and a bitline;
- and
- wherein peripheral logic circuits of said DDR DRAM are adapted to execute a write burst enable and a column address command one clock cycle earlier in low frequency operating mode than in high frequency operating mode, adapted to execute an auto-precharge enable one-half clock cycle earlier in low frequency operating mode than in high frequency operating mode, and having a column address latency of one clock cycle in test mode and two or three clock cycles in operational mode.
Dependencies are inferred from the claim text.