Tri-state output driver arranging method and memory device using the same

The device of claim I where the first driver includes

• a first transistor configured to output a supply voltage to the data bus line responsive to a first output signal from the first sensing amplifier;
• and
• a second transistor configured to output a ground voltage to the data bus line responsive to a second output signal from the first sensing amplifier.

A device comprising:

• a plurality of input units to generate driver input signals responsive to data received from a memory array;
• and
• a plurality of drivers, each to generate a tri-state signal responsive to respective driver input signals from associated input units, the drivers to load an output line with the tri-state signals, each tri-state signal providing a substantially equal output load to the output line.

A method comprising:

• arranging a first sensing amplifier and a first driver of a first input/output line sensing amplifier in separate regions of a memory device, the first driver to load a data bus line with a first tri-state output;
• and
• arranging a second sensing amplifier and a second driver of a second input/output line sensing amplifier in a common region of the memory device, the second driver to load the data bus line with a second tri-state output, where the second tri-state output loads the data bus line substantially the same as the first tri-state output.