Method and apparatus for evaluating and optimizing a signaling system

A circuit comprising:

• a semiconductor chip;
• a transmit circuit disposed on the semiconductor chip, the transmit circuit to generate a first sequence of symbols while using a parameter set to a first value and to generate a second sequence of symbols while using the parameter set to a second value;
• a receive circuit disposed on the semiconductor chip, the receive circuit to receive the first and second sequences of symbols and to generate respective first and second received sequences of symbols;
• and
• a comparison circuit disposed on the semiconductor chip, the comparison circuit to compare the first sequence of symbols with the first received sequence of symbols to generate a first comparison result and to compare the second sequence of bits with the second received sequence of symbols to generate a second comparison result.

A circuit comprising:

• a semiconductor chip;
• a transmit circuit disposed on the semiconductor chip, the transmit circuit to generate an output signal, the output signal having a first sequence of symbols;
• a receive circuit disposed on the semiconductor chip, the receive circuit to receive the first sequence of symbols and generate a first received sequence of symbols using a parameter having a value;
• and
• a comparison circuit disposed on the semiconductor chip, the comparison circuit to compare the first received sequence of symbols with a second sequence of symbols to generate a comparison result;
• wherein the value of the parameter is adjustable.

A circuit comprising:

• a semiconductor chip;
• a transmit circuit disposed on the semiconductor chip, the transmit circuit to generate a first output signal having first and second sequences of symbols;
• a receive circuit disposed on the semiconductor chip, the receive circuit to receive the first sequence of symbols and to generate, while using a parameter that is set to a first value, a first received sequence of symbols and to receive the second sequence of symbols and to generate, while the parameter is set to a second value, a second received sequence of symbols;
• and
• a comparison circuit disposed on the semiconductor chip, the comparison circuit to compare the first received sequence of symbols with a third sequence of symbols to generate a first comparison result and to compare the second received sequence of symbols with a forth sequence of symbols to generate a second comparison result.

A circuit comprising:

• a semiconductor chip;
• a transmit circuit disposed on the semiconductor chip, the transmit circuit to generate a first output signal having first and second sequences of symbols;
• a receive circuit disposed on the semiconductor chip, the receive circuit to receive the first sequence of symbols and to generate, while using a parameter that is set to a first value, a first received sequence of symbols, and to receive the second sequence of symbols and to generate, while the parameter is set to a second value, a second received sequence of symbols;
• and
• a comparison circuit disposed on the semiconductor chip, the comparison circuit to compare the first received sequence of symbols with the first sequence of symbols to generate a first comparison result and to compare the second received sequence of symbols with the second sequence of symbols to generate a second comparison result.