Enhanced MRAM reference bit programming structure
AssigneeHoneywell International Inc.
InventorEric Leung
Life of this patent
Estimating the term…
Abstract
An MRAM circuit includes an MRAM array having a plurality of operational MRAM elements and a reference cell made up of one or more reference MRAM elements. A plurality of program lines within a first region are cladded with a flux-concentrating layer configured to focus a generated magnetic field while the portions of the program lines within a second region are uncladded so that the generated magnetic field is unfocused. Generally, the first region is associated with the operational MRAM elements and the second region is associated with the reference cell.
Claims20
An MRAM circuit comprising:
- a cladded region of a program line arranged near an operational MRAM element;
- and
- an uncladded region of a program line arranged near a reference MRAM element.
An MRAM circuit comprising:
- an MRAM array including a plurality of operational MRAM elements;
- a reference cell including one or more reference MRAM elements;
- a plurality of program lines wherein the portions of the program lines within a first region are cladded and the portions of the program lines within a second region are uncladded, and wherein the first region is associated with the operational MRAM elements and the second region is associated with the reference cell.
A memory device comprising:
- a first magnetoresistive element configured for storing a datum;
- a first program line including a flux-concentrating layer configured to focus a generated magnetic field on the first magnetoresistive element;
- a second magnetoresistive element configured for serving as a reference;
- a second program line disposed near the second magnetoresistive element, wherein the second program line includes an unclad conductive line configured to create an unfocused generated magnetic field.
Dependencies are inferred from the claim text.