Timing controller for liquid crystal display
AssigneeSamsung Electronics Co., Ltd.
InventorMyeong-Su Kim
Life of this patent
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Abstract
A timing controller for a liquid crystal display device includes an error detection module that detects an error in signals input from an external source and generates a data signal based on the error in the signals, so as to display the data signal on a liquid crystal panel for a predetermined time period. Thus, the liquid crystal display device stably displays the data signal while compensating for the error in the input signals, thereby improving the image quality of the liquid crystal display device.
Claims24
A timing controller for a unit displaying frames of image data in response to the receipt of a main clock signal and a data enable signal, comprising:
- an error detector for outputting an error signal if the main clock signal is maintained in a high level or a low level state without being toggled for a predetermined time period, said error detector outputting an error signal if the period of the data enable signal does not match a predetermined reference period, or if the number of activations of the data enable signal does not match a predetermined reference number.
A timing controller comprising:
- a clock generator receiving a voltage from an external source to generate a first clock signal;
- an error detector receiving a second clock signal and a data enable signal from an exterior to output a detection signal based on an error in the second clock signal and the data enable signal;
- a data generator generating a first data signal corresponding to the detection signal;
- a first multiplexer selectively outputting the first clock signal or the second clock signal in response to the detection signal;
- a second multiplexer selectively outputting the first data signal or a second data signal, which is input from an exterior, in response to the detection signal;
- and
- a signal generator generating a data signal and a control signal in response to signals output from the first and second multiplexers.
A method of driving a timing controller, the method comprising:
- receiving an external voltage to generate a first clock signal;
- outputting a detection signal based on an error in a second clock signal and a data enable signal received from an external source;
- generating a first data signal corresponding to the detection signal;
- selectively outputting the first clock signal or the second clock signal in response to the detection signal;
- selectively outputting the first data signal or a second data signal, which is input from an external source, in response to the detection signal;
- and
- generating a data signal and a control signal in response to the first or second clock signal, and the first or second data signal, respectively.
A liquid crystal display device comprising:
- a liquid crystal panel displaying an image in response to a driving signal;
- a timing controller receiving a first clock signal and a data enable signal from an external source in order to output a detection signal based on an error in the first clock signal and the data enable signal, and outputting a data signal and a control signal corresponding to the detection signal while maintaining the detection signal for a predetermined time period;
- and
- a driving module outputting a driving signal in response to the data signal and the control signal to drive the liquid crystal panel.
Dependencies are inferred from the claim text.