Semiconductor device
AssigneePanasonic Corporation
InventorsMasaya Hirose, Kinya Daio, Tetsuya Oosaka
Life of this patent
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Abstract
The semiconductor device includes: an A/D conversion circuit; a digital processing circuit for performing processing based on conversion results of the A/D conversion circuit; and an output terminal for testing for outputting the conversion results of the A/D conversion circuit externally. The output of the conversion results from the output terminal for testing is made at timing that is different from timing of other conversion operation of which conversion results are to be outputted later and is longer in cycle than timing of conversion operation.
Claims17
A semiconductor device comprising:
- an A/D conversion circuit;
- a digital processing circuit for performing processing based on conversion results of the AID conversion circuit;
- and
- an output terminal for testing for outputting the conversion results of the A/D conversion circuit externally,
- wherein the output of the conversion results from the output terminal for testing is made at timing that is different from timing of other conversion operation of which conversion results are to be outputted later and is longer in cycle than timing of conversion operation.
A semiconductor device comprising:
- an A/D conversion circuit;
- a digital processing circuit for performing processing based on conversion results of the A/D conversion circuit;
- and
- an output terminal for testing for outputting the conversion results of the A/D conversion circuit externally,
- wherein output timing of the conversion results from the output terminal for testing is controlled according to a timing control signal input externally.
A semiconductor device comprising:
- an A/D conversion circuit for performing AID conversion every clock cycle of an operation clock signal;
- a digital processing circuit for performing processing based on conversion results of the A/D conversion circuit;
- and
- an output terminal for testing for outputting the conversion results of the A/D conversion circuit externally,
- wherein the device further comprises an output suppression circuit for suppressing output of the conversion results to the output terminal for testing at predetermined timing.
Dependencies are inferred from the claim text.