Level shift circuit
AssigneeSanyo Epson Imaging Devices Corporation
InventorsHiroyuki Horibata, Michiru Senda
Life of this patent
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Abstract
A level shift circuit basically has a configuration connecting two CMOS inverter circuits in parallel, furnishes an input signal to a control terminal of the inverter circuit, obtains an output signal from an output terminal of the inverter circuit, and has a function for level shifting the voltage amplitude of the input signal to the voltage amplitude of the supply voltage of the inverter circuit. The signal that is input by the gate terminal of an n-channel transistor arranged in each of two current paths forming the level shift circuit is not a direct input signal but a signal that is supplied by adding an offset corresponding to the threshold of each n-channel transistor with respect to the voltage amplitude of the input signal via the input voltage converter circuit.
Claims5
A level shift circuit comprising:
- a first current path and a second current path disposed in parallel to a supply having a first voltage amplitude and respectively connected in series to a first transistor of a first polarity and a second transistor of a first polarity and a third transistor of a second polarity;
- a connection point connecting the second transistor and the third transistor in the first current path connected to a control terminal of the first transistor of the second current path and a connection point connecting the second transistor and the third transistor in the second current path connected to a control terminal of the first transistor of the first current path;
- an input signal having a second voltage amplitude smaller than the first voltage amplitude respectively input by a control terminal of the second transistor of the first current path and a control terminal of the second current path;
- the second voltage amplitude of the input signal level shifted to the first voltage amplitude and output from a connection point connecting the second transistor and the third transistor in the first current path or the second current path;
- and
- an input voltage converter circuit wherein the input signal undergoes voltage conversion and a converted signal is respectively supplied to a control terminal of the third transistor of the first current path and the second current path;
- the input voltage converter circuit adds an offset voltage corresponding to a threshold of the third transistor with respect to the second voltage amplitude.
Dependencies are inferred from the claim text.