US 2007/0164779 A1 · Feedback circuit for line load compensation and reflection reduction

Abstract

Line load compensation and reflection reduction in a signal transmitting circuit is provided using feedback capacitors. The feedback capacitor serially coupled with a resistance generates an RC rise/fall time that is independent of the line load. Additionally, by selecting a capacitor that yields a rise/fall time of approximately ⅓ of the maximum bit transmission time, signal reflection on the signal line can be reduced. Accordingly, by incorporating the feedback capacitor with a differential drive circuit, such as the IB 485 driver, variations in line load can be compensated for while also reducing signal reflection due to un-terminated or improperly terminated signal lines, thus allowing a free topology implementation.

Claims18

Dependent claims

A feedback sub-circuit for providing line load compensation and reflection reduction in a signal transmitting circuit, said feedback sub-circuit comprising:

a feedback capacitor;
and
at least one resistor in serial connection with said feedback capacitor, a rise/fall time of said feedback capacitor and said resistor being equal to a fractional value of a bit transmission time, said transmission bit time being based on a baud rate and a maximum transmission line length.

A feedback sub-circuit for providing line load compensation and reflection reduction in a signal transmitting circuit, said feedback sub-circuit comprising:

a first transistor, a second transistor and a third transistor, a first lead of said first transistor and a second lead of said second transistor being connected to a third lead of said third transistor at a first node, a third lead of said second transistor being connected to a first lead of said third transistor at a second node;
and
a feedback capacitor having a first lead connected to a third lead of said first transistor at a third node, and a second lead connected to a second lead of said third transistor at a fourth node.

A differential drive circuit having a free topology and variable line load requirement, comprising:

a plurality of feedback sub-circuit for providing line load compensation and reflection reduction, each feedback sub-circuit of said plurality of feedback sub-circuits comprising:
a first transistor, a second transistor and a third transistor, a first lead of said first transistor and a second lead of said second transistor being connected to a third lead of said third transistor at a first node, a third lead of said second transistor being connected to a first lead of said third transistor at a second node;
a feedback capacitor having a first lead connected to a third lead of said first transistor at a third node, and a second lead connected to a second lead of said third transistor at a fourth node;
a first resistor having a first lead connected to a first lead of said second transistor at a fifth node, and a second lead connected to said second node;
a voltage source having a positive lead connected to said fifth node;
a second resistor having a first lead adapted for being connected to an input signal source having an arbitrarily selected load, and a second lead of said second resistor being connected to said third lead of said first transistor at said third node;
a third resistor having a first lead connected to said third node, and a second lead connected to said fifth node;
a fourth resistor having a first lead connected to a second lead of said first transistor at a sixth node, and a second lead connected to a ground potential;
and
a diode having a first lead connected to said fourth node, and a second lead adapted for emitting an output signal, said output signal being independent of the load of said input signal.

7 more elements

Dependencies are inferred from the claim text.

Feedback circuit for line load compensation and reflection reduction

Life of this patent

Feedback circuit for line load compensation and reflection reduction

Life of this patent

Abstract

Claims18