Thin film transistor substrate for display device and fabricating method thereof

A method of fabricating a thin film transistor (TFT) substrate for a display device, comprising the steps of:

• forming, on a substrate, a gate line and a gate electrode connected to the gate line;
• covering the gate line and gate electrode with a gate insulating film;
• forming a semiconductor layer over a predetermined area of the gate insulating film;
• forming a data line, a source electrode connected to the data line, a drain electrode, and a first upper storage electrode, wherein the data line crosses the gate line to define a pixel area, wherein the drain electrode is separated from the source electrode at a channel region by the semiconductor layer, wherein the first upper storage electrode overlaps a first portion of the gate line, and wherein the gate insulating film and the semiconductor layer are between the first upper storage electrode and the first portion of the gate line;
• forming a protective film over the gate line, the data line, and the TFT;
• forming a pixel hole through the protective film and the gate insulating film, wherein the pixel hole is arranged within the pixel area and outside the pixel area and wherein forming the pixel hole includes removing a portion of the first upper storage electrode outside the pixel area;
• forming a pixel electrode within the portion of the pixel hole arranged within the pixel area, the pixel electrode contacting a side surface of the drain electrode;
• and
• forming a second upper storage electrode extending from the pixel hole within the pixel area and contacting a side surface of the first upper storage electrode.

A method of fabricating a thin film transistor (TFT) substrate for a display device, comprising:

• forming a gate metal layer on a substrate;
• forming a gate metal pattern from the gate metal layer, the gate metal pattern including a gate line and a gate electrode;
• depositing a gate insulating film, an undoped amorphous silicon layer, a doped amorphous silicon layer, and a data metal layer over the gate metal pattern;
• forming a data metal pattern, an ohmic contact layer, and an active layer, the data metal pattern including a data line, a source electrode, a drain electrode, and a first upper storage electrode, wherein the data line crosses the gate line to define a pixel area, wherein the drain electrode is separated from the source electrode at a channel region by the active layer, and wherein the first upper storage electrode overlaps the gate line;
• forming a pixel hole through the gate insulating film within the pixel area and outside area, wherein forming the pixel hole includes removing a portion of the first upper storage electrode outside the pixel area;
• forming a pixel electrode within the portion of the pixel hole arranged within the pixel area, the pixel electrode contacting a side surface of the drain electrode within the pixel hole;
• and
• forming a second upper storage electrode extending from the pixel electrode within the pixel hole and contacting a side surface of the first upper storage electrode.