Method of manufacturing semiconductor device and the semiconductor device manufactured by the method
AssigneeKawasaki Microelectronics, Inc.
InventorRyo Nakamura
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Abstract
The method of manufacturing the semiconductor device that includes a high voltage MOS transistor with high operating voltage under both high and low gate voltages with low-cost is disclosed. When manufacturing the high voltage MOS transistor, a portion of a gate insulation film is removed to form an opening that exposes an outside area of the active area, which is outside of the central area where a gate electrode will be formed. A shallow grade layer is formed by implanting impurities into an opening with an energy that does not permit penetration of impurity ions through the gate insulation film.
Claims5
A semiconductor device containing a MOS transistor on a semiconductor substrate comprising:
- a gate insulation film formed on a surface of an active area in a surface of said semiconductor substrate, the active area having a first conduction type;
- a gate electrode formed on said gate insulation film;
- a deep grade layer of a second conduction type formed in the surface of the active area, the deep grade layer extending outwardly from a gate edge right under an edge of the gate electrode;
- a drain layer of said second conduction type formed in a surface of the deep grade layer, the drain layer being doped heavier compared with said deep grade layer, the drain layer extending outwardly from a first edge positioned away from said gate edge;
- and
- a shallow grade layer of said second conduction type formed at least in a portion of the surface of the deep grade layer adjacent to the first edge of the drain layer, the shallow grade layer being lightly doped compared with the drain layer, the shallow grade layer increases a concentration of impurities of said second conduction type in the vicinity of the surface of said active area adjacent to the first edge of the drain layer compared with the concentration at the gate edge;
- wherein said gate insulation film is removed in an area corresponding to said shallow grade layer.
A semiconductor device containing a MOS transistor formed using a manufacturing process on a semiconductor substrate comprising:
- a gate insulation film formed on a surface of an active area in a surface of the semiconductor substrate, the active area having a first conduction type;
- a gate electrode formed on the gate insulation film;
- a deep grade layer of a second conduction type formed in the surface of the active area, the deep grade layer extending outwardly from a gate edge right under an edge of the gate electrode;
- a drain layer of said second conduction type formed in a position of the surface of said deep grade layer, the drain layer being doped heavier compared with said deep grade layer, the drain layer extending outwardly from a first edge positioned away from the gate edge;
- and
- a shallow grade layer of said second conduction type formed at least at a portion in the surface of the deep grade layer adjacent to the first edge of said drain layer, the shallow grade layer having a width not smaller than a design rule of the manufacturing process and being lightly doped compared with the drain layer, the shallow grade layer increases a concentration of impurities of said second conduction type in the vicinity of the surface of said active area adjacent to the first edge of the drain layer compared with the concentration at the gate edge, and a peak of the concentration of the impurities in said shallow grade layer locates at a shallower position than a depth of said drain layer.
Dependencies are inferred from the claim text.