Back to results
US 2007/0164318 A1Published application
Semiconductor device and method for manufacturing the same
AssigneeSeiko Epson Corporation
InventorTeruo Takizawa
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes: a semiconductor layer formed on a semiconductor substrate by performing epitaxial growth; a first buried insulating layer which is buried in the first region under the semiconductor layer; and a second buried insulating layer which is buried in the second region under the semiconductor layer in the position lower than the first buried insulating layer.
Claims7
A semiconductor device, comprising:
- a semiconductor layer formed on a semiconductor substrate by performing epitaxial growth;
- a first buried insulating layer which is buried in a first region under the semiconductor layer;
- and
- a second buried insulating layer which is buried in a second region under the semiconductor layer in a position lower than the first buried insulating layer.
1 more element
A semiconductor device, comprising:
- a first semiconductor layer formed on a semiconductor substrate by performing epitaxial growth;
- a second semiconductor layer formed on the first semiconductor layer by performing epitaxial growth;
- a first buried insulating layer which is buried in a first region between the semiconductor substrate and the first semiconductor layer;
- and
- a second buried insulating layer which is buried in a second region between the first semiconductor layer and the second semiconductor layer.
2 more elements
A method for manufacturing a semiconductor device, comprising:
- forming a first semiconductor layer partially on a semiconductor substrate;
- forming on the semiconductor substrate a second semiconductor layer having slower etching rate than that of the first semiconductor layer so as to cover the first semiconductor layer;
- forming partially on the second semiconductor layer a third semiconductor layer having faster etching rate than that of the second semiconductor layer and arranged in a portion other than the first semiconductor layer;
- forming on the second, semiconductor layer a fourth semiconductor layer having slower etching rate than that of the third semiconductor layer so as to cover the third semiconductor layer;
- exposing at least a portion of the first semiconductor layer from the second and the fourth semiconductor layers and forming a exposure portion that exposes at least a portion of the third semiconductor layer from the fourth semiconductor layer;
- forming a first void portion and a second void portion from which the first semiconductor layer and the third semiconductor layer are selectively removed by selectively etching the first semiconductor layer and the third semiconductor layer thorough the exposure portion;
- and
- forming a first buried insulating layer and a second buried insulating layer respectively which is buried in the first void portion and the second void portion.
5 more elements
Dependencies are inferred from the claim text.