Integrated circuit arrangement with shockley diode or thyristor and method for production and use of a thyristor
AssigneeInfineon Technologies AG
InventorsUlrich Glaser, Harold Gossner, Kai Esmark
Life of this patent
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Abstract
An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded during the implantation of a p-type well. This gives rise to a Shockley diode or a thyristor having improved electrical properties, in particular with regard to the use as an ESD protection element.
Claims25
An integrated circuit arrangement comprising:
- an anode region located in a substrate, the anode region doped in accordance with a p doping type;
- a cathode region located in the substrate, the cathode region spaced apart from the anode region and doped in accordance with an n doping type in the substrate;
- an n-type inner region doped in accordance with the n doping type and with a lower dopant concentration in comparison with the anode region, said n-type inner region adjoining the anode region in the substrate;
- a p-type inner region doped in accordance with the p doping type and with a lower dopant concentration in comparison with the cathode region, said p-type inner region adjoining me cathode region and the n-type inner region in the substrate,
- a p-type well containing a maximum dopant concentration along a first path running counter to the direction of the normal to a surface of the substrate and through or at the cathode region down to a depth at which the maximum dopant concentration of the p-type well is situated, the maximum dopant concentration of the p-type inner region remains below the maximum p-type dopant concentration of the p-type well;
- and/or
- in an n-type well containing a maximum n-type dopant concentration, along a second path running counter to the direction of the normal to the surface of the substrate and through or at the anode region down to a depth at which the maximum dopant concentration of the n-type well is situated, the maximum dopant concentration of the n-type inner region remains below the maximum n-type dopant concentration of the n-type well.
The circuit arrangement as claimed in claim 17 wherein the distance between the anode region and the cathode region is less than 3 micrometers.
A method for producing an integrated circuit arrangement, the method comprising shielding a p-type inner region during the doping of a p-type well.
A method for producing an integrated circuit arrangement, the method comprising shielding an n-type inner region during the doping of a n-type well.
Dependencies are inferred from the claim text.