Secure software system and method for a printer
OwnerSteven Pauly, Robert Arsenault +7inventors
InventorsSteven Pauly, Robert Arsenault, Gary Jacobson, George Monroe, Walter Baker, Wesley Kirschner, Robert Sisson, Sung Chang, Elaine Cristiani
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Abstract
A postal security device (PSD) includes a microprocessor including an internal random access memory (RAM) and an internal flash memory in which is stored at least one secure datum, and at least one external memory coupled to the microprocessor in which is stored at least one non-secure datum and not one of the at least one secure datum.
Claims19
A postal security device (PSD) comprising:
- a microprocessor comprising an internal random access memory (RAM) and an internal memory comprising at least one secure datum of said PSD;
- and
- at least one external memory coupled to said microprocessor comprising at least one non-secure datum and not comprising one of said at least one secure datum.
A method of securing at least one secure datum in a postal security device (PSD) comprising:
- storing said at least one secure datum of said PSD in an internal flash memory of a microprocessor;
- and
- storing at least one non-secure datum in an external memory coupled to said microprocessor wherein said external memory does not comprise one of said at least one secure datum.
An apparatus comprising:
- a first microprocessor comprising an internal random access memory (RAM) and an internal flash memory in which is stored at least one secure datum of a postal security device (PSD) said first microprocessor coupled to at least one external memory comprising at least one non-secure datum and not comprising one of said at least one secure datum;
- and
- a second microprocessor comprising an internal RAM and an internal flash memory in which is stored at least one secure datum of said PSD said second microprocessor coupled to at least one external memory comprising at least one non-secure datum and not comprising one of said at least one secure datum;
- wherein an operation of said first microprocessor is coordinated with an operation of said second microprocessor via a coupling.
Dependencies are inferred from the claim text.