US 2007/0146022 A1Published application

Analog frequency divider

AssigneeKabushiki Kaisha Toyota Jidoshokki

InventorJunji Inoue

Life of this patent

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Abstract

The parallel circuit of an inductor L1 and a resistor R1 is connected between a power supply voltage VDD and the drain of a MOS transistor TR1 as a load, and the parallel circuit of am inductor L2 and a resistor R2 is connected between a power supply voltage VDD and the drain of a MOS transistor TR2 as a load.

Claims8

Dependent claims

An analog frequency divider, comprising:

a power supply voltage;
first and second MOS transistors;
first and second loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between drains of the first and second MOS transistors and the power supply voltage;
a third MOS transistor whose drain is connected to the drain of the first MOS transistor and to whose gate is connected an output of the second MOS transistor;
a fourth MOS transistor whose drain is connected to the drain of the second MOS transistor and to whose gate is connected an output of the first MOS transistor;
a fifth MOS transistor whose drain is connected to sources of the first and second MOS transistors and to whose gate is inputted an analog input signal P;
a sixth MOS transistor whose drain is connected to sources of the third and fourth MOS transistors and to whose gate is inputted an inverted signal N of the input signal P;
a seventh MOS transistor whose gate is inputted an output of the first MOS transistor;
an eighth MOS transistor whose gate is inputted an output of the second MOS transistor;
third and fourth loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between drains of the seventh and eighth MOS transistors and the power supply voltage;
a ninth MOS transistor whose drain is connected to the drain of the seventh MOS transistor and to whose gate is inputted an output of the eighth MOS transistor;
a tenth MOS transistor whose drain is connected to the drain of the eighth MOS transistor and to whose gate is inputted an output of the seventh MOS transistor;
an eleventh MOS transistor whose drain is connected to sources of the seventh and eighth MOS transistors and to whose gate is inputted the inverted signal N;
a twelfth MOS transistor whose drain is connected to sources of the ninth and eleventh MOS transistors and to whose gate is inputted the input signal P;
and
a current source which is connected between a source of the fifth, sixth, eleventh and twelfth MOS transistor and the ground.

13 more elements

An analog frequency divider, comprising:

a power supply voltage;
first and second bi-polar transistors;
first and second loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between collectors of the first and second bi-polar transistors and the power supply voltage;
a third bi-polar transistor whose collector is connected to the collector of the first bi-polar transistor and to whose base is connected an output of the second bi-polar transistor;
a fourth bi-polar transistor whose collector is connected to the collector of the second bi-polar transistor and to whose base is connected an output of the first bi-polar transistor;
a fifth bi-polar transistor whose collector is connected to emitters of the first and second bi-polar transistors and to whose base is inputted an analog input signal P;
a sixth bi-polar transistor whose collector is connected to emitters of the third and fourth bi-polar transistors and to whose base is inputted an inverted signal N of the input signal P;
a seventh bi-polar transistor whose base is inputted an output of the first bi-polar transistor;
an eighth bi-polar transistor whose base is inputted an output of the second bi-polar transistor;
third and fourth loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between collectors of the seventh and eighth bi-polar transistors and the power supply voltage;
a ninth bi-polar transistor whose collector is connected to the collector of the seventh bi-polar transistor and to whose base is inputted an output of the eighth bi-polar transistor;
a tenth bi-polar transistor whose collector is connected to the collector of the eighth bi-polar transistor and to whose base is inputted an output of the seventh bi-polar transistor;
an eleventh bi-polar transistor whose collector is connected to emitters of the seventh and eighth bi-polar transistors and to whose base is inputted the inverted signal N;
a twelfth bi-polar transistor whose collector is connected to emitters of the ninth and eleventh bi-polar transistors and to whose base is inputted the input signal P;
and
a current source which is connected between a source of the fifth, sixth, eleventh and twelfth bi-polar transistor and the ground.

13 more elements

An analog frequency divider, comprising:

a power supply voltage;
first and second MOS transistors;
first and second loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between drains of the first and second MOS transistors and the power supply voltage;
a third MOS transistor whose drain is connected to the drain of the first MOS transistor and to whose gate is connected an output of the second MOS transistor;
a fourth MOS transistor whose drain is connected to the drain of the second MOS transistor and to whose gate is connected an output of the first MOS transistor;
a fifth MOS transistor whose drain is connected to sources of the first and second MOS transistors and to whose gate is inputted an analog input signal P;
a sixth MOS transistor whose drain is connected to sources of the third and fourth MOS transistors and to whose gate is inputted an inverted signal N of the input signal P;
a seventh MOS transistor whose gate is inputted an output of the first MOS transistor;
an eighth MOS transistor whose gate is inputted an output of the second MOS transistor;
third and fourth loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between drains of the seventh and eighth MOS transistors and the power supply voltage;
a ninth MOS transistor whose drain is connected to the drain of the seventh MOS transistor and to whose gate is inputted an output of the eighth MOS transistor;
a tenth MOS transistor whose drain is connected to the drain of the eighth MOS transistor and to whose gate is inputted an output of the seventh MOS transistor;
an eleventh MOS transistor whose drain is connected to sources of the seventh and eighth MOS transistors and to whose gate is inputted the inverted signal N;
a twelfth MOS transistor whose drain is connected to sources of the ninth and eleventh MOS transistors and to whose gate is inputted the input signal P;
and
a current source which is connected between a source of the fifth, sixth, eleventh and twelfth MOS transistor and the power supply voltage.

13 more elements

An analog frequency divider, comprising:

a power supply voltage;
first and second bi-polar transistors;
first and second loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between collectors of the first and second bi-polar transistors and the power supply voltage;
a third bi-polar transistor whose collector is connected to the collector of the first bi-polar transistor and to whose base is connected an output of the second bi-polar transistor;
a fourth bi-polar transistor whose collector is connected to the collector of the second bi-polar transistor and to whose base is connected an output of the first bi-polar transistor;
a fifth bi-polar transistor whose collector is connected to emitters of the first and second bi-polar transistors and to whose base is inputted an analog input signal P;
a sixth bi-polar transistor whose collector is connected to emitters of the third and fourth bi-polar transistors and to whose base is inputted an inverted signal N of the input signal P;
a seventh bi-polar transistor whose base is inputted an output of the first bi-polar transistor;
an eighth bi-polar transistor whose base is inputted an output of the second bi-polar transistor;
third and fourth loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between collectors of the seventh and eighth bi-polar transistors and the power supply voltage;
a ninth bi-polar transistor whose collector is connected to the collector of the seventh bi-polar transistor and to whose base is inputted an output of the eighth bi-polar transistor;
a tenth bi-polar transistor whose collector is connected to the collector of the eighth bi-polar transistor and to whose base is inputted an output of the seventh bi-polar transistor;
an eleventh bi-polar transistor whose collector is connected to emitters of the seventh and eighth bi-polar transistors and to whose base is inputted the inverted signal N;
a twelfth bi-polar transistor whose collector is connected to emitters of the ninth and eleventh bi-polar transistors and to whose base is inputted the input signal P;
and
a current source which is connected between a source of the fifth, sixth, eleventh and twelfth bi-polar transistor and the power supply voltage.

13 more elements

Dependencies are inferred from the claim text.

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Abstract

An analog frequency divider, comprising:

a power supply voltage;
first and second MOS transistors;
first and second loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between drains of the first and second MOS transistors and the power supply voltage;
a third MOS transistor whose drain is connected to the drain of the first MOS transistor and to whose gate is connected an output of the second MOS transistor;
a fourth MOS transistor whose drain is connected to the drain of the second MOS transistor and to whose gate is connected an output of the first MOS transistor;
a fifth MOS transistor whose drain is connected to sources of the first and second MOS transistors and to whose gate is inputted an analog input signal P;
a sixth MOS transistor whose drain is connected to sources of the third and fourth MOS transistors and to whose gate is inputted an inverted signal N of the input signal P;
a seventh MOS transistor whose gate is inputted an output of the first MOS transistor;
an eighth MOS transistor whose gate is inputted an output of the second MOS transistor;
third and fourth loads each of which is made of a parallel circuit of an inductor and a resistor and which are connected between drains of the seventh and eighth MOS transistors and the power supply voltage;
a ninth MOS transistor whose drain is connected to the drain of the seventh MOS transistor and to whose gate is inputted an output of the eighth MOS transistor;
a tenth MOS transistor whose drain is connected to the drain of the eighth MOS transistor and to whose gate is inputted an output of the seventh MOS transistor;
an eleventh MOS transistor whose drain is connected to sources of the seventh and eighth MOS transistors and to whose gate is inputted the inverted signal N;
a twelfth MOS transistor whose drain is connected to sources of the ninth and eleventh MOS transistors and to whose gate is inputted the input signal P;
and
a current source which is connected between a source of the fifth, sixth, eleventh and twelfth MOS transistor and the ground.

13 more elements