Design and fabrication of rugged fred, power mosfet or igbt
AssigneeMicrosemi Corp. —Power Products Group
InventorsShanqi Zhao, Dumitru Sdrulla
Life of this patent
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Abstract
An improved Fast Recovery Diode comprises a main PN junction defining a central conduction region for conducting high current in a forward direction and a peripheral field spreading region surrounding the central conduction region for blocking high voltage in the reverse direction. The main PN junction has an avalanche voltage equal to or lower than an avalanche voltage of the peripheral field spreading region so substantially the entire said main PN junction participates in avalanche conduction. This rugged FRED structure can also be formed in MOSFETS, IGBTS and the like.
Claims27
An improved Fast Recovery Diode comprising:
- a main PN junction defining a central conduction region for conducting high current in a forward direction;
- and
- a field spreading region surrounding the central conduction region for blocking high voltage in the reverse direction;
- the main PN junction having an avalanche voltage equal to or lower than an avalanche voltage of the field spreading region so that substantially the entire said main PN junction participates in avalanche conduction.
A fabrication process for making an enhanced avalanche ruggedness Fast Recovery Diode, the process comprising:
- selecting a semiconductor material of a first dopant type;
- patterning and introducing a first dopant of a second type opposite in polarity to the first dopant type into the top surface of the semiconductor material at a peripheral region of the device;
- diffusing said first dopant to create field spreading structures for blocking reverse voltage;
- introducing a second dopant of the first type into a central portion of the semiconductor material top surface;
- diffusing said second dopant to create a region with enhanced doping concentration of the first type within the semiconductor material in the central portion of the device;
- introducing and diffusing a third dopant of the second type to a predetermined depth within said enhanced doping region to form a main PN junction and effect a lower avalanche breakdown in the central portion in relationship to a periphery of the main PN junction;
- and
- completing the device by forming metal electrodes on the top surface and a backside of the semiconductor material to conduct current through the diode.
A fabrication process for making an enhanced avalanche ruggedness Fast Recovery Diode comprising:
- selecting a semiconductor material of a first dopant type;
- patterning and defining a field spreading region and a central conduction region of the diode in a top surface of the semiconductor material;
- patterning and defining within the central conduction region trenches of a predetermined depth in the semiconductor material;
- introducing and diffusing a first dopant of a second type opposite in polarity to the dopant of the first type into the top surface in said defined field spreading region and central conduction region, said diffusion creating in the central conduction region a PN junction having acute curvature at the corners and edges of said trenches;
- and
- completing the device by forming metal electrodes on the frontside and backside of the semiconductor to conduct current through the device.
A fabrication process for making an enhanced avalanche ruggedness Fast Recovery Diode comprising:
- selecting a semiconductor material of a first dopant type;
- patterning and defining a central conduction region bounded by a periphery in a top surface of the semiconductor material;
- etching to reduce the semiconductor material thickness by about 15 to 20% within said defined central conduction region in relationship to its periphery;
- patterning and defining a field spreading region surrounding the central conduction region of the device;
- introducing and diffusing a first dopant of a second type opposite in polarity to the dopant of the first type into the top surface in said defined field spreading region and central conduction region;
- and
- completing the device by forming metal electrodes on the frontside and backside of the semiconductor to conduct current through the device.
A MOS gate-controlled power device having enhanced avalanche ruggedness, the device comprising:
- a semiconductive substrate including a first layer (112, 213) having a doping type of a first polarity in a first concentration (N+);
- a second layer (114, 214) having a doping type of the first polarity in a second concentration (N) less than the first concentration;
- a body region (122, 322) formed in the second layer having a doping type of a second polarity opposite the first polarity in a third concentration (P);
- a first enhanced region (222, 422) formed in the body region having a doping type of the second polarity in a fourth concentration (P+) greater than the third concentration;
- a source region formed in a position of the body region adjoining the enhanced region (222, 422) and body region (122, 322) having a doping type of the first polarity in a fifth concentration (N+) greater than the second concentration;
- an insulated gate structure formed on a surface of the second layer in position to overlie a channel portion of the body region extending along the surface between the source region and a drift region of the second layer;
- and
- a second enhanced region (120, 220) of the doping type of the first polarity in a sixth concentration (N+) greater than the second concentration (N);
- the body region extending to a first depth and the first enhanced region extending to a second depth within the second layer to form a PN junction therewith;
- and
- the second enhanced region extending to a third depth within the second layer, the third depth exceeding both the first depth and the second depth so that avalanche breakdown occurs in the first enhanced region.
Dependencies are inferred from the claim text.