Nonvolatile ferroelectric memory device including failed cell correcting circuit
AssigneeHynix Semiconductor Inc.
InventorsHee Kang, Jin Ahn
Life of this patent
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Abstract
A nonvolatile ferroelectric memory device including a failed cell correcting circuit which effectively processes randomly distributed cell data. The nonvolatile ferroelectric memory device checks horizontal parity of a main memory cell array and stores the parity in a horizontal parity check cell array, and checks vertical parity of a main memory cell array and stores the parity in the vertical parity check cell array. Then, code data stored in the horizontal parity check cell array and the vertical parity check cell array are compared to sensing data of the main memory cell to correct an error datum. As a result, a 1 bit failure randomly generated within a predetermined column is corrected.
Claims14
A nonvolatile ferroelectric memory device comprising:
- a main memory cell array including a plurality of nonvolatile ferroelectric memory cells configured as a plurality of main cell array groups;
- a horizontal parity check cell array adapted and configured to determine a parity of a horizontal portion of the plurality of main cell array groups and store the determined parity as code data in a horizontal parity memory array;
- a vertical parity check cell array adapted and configured to determine a parity of a vertical portion of the plurality of main cell array groups and store the determined parity as code data in a vertical parity memory array;
- and
- an error correcting code processing unit adapted and configured to compare data stored in the main cell array groups, the code data stored in the horizontal parity check cell array and the code data stored in the vertical parity, check cell array and to correct error data generated from a corresponding column into normal data.
Dependencies are inferred from the claim text.