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AssigneeInternational Business Machines Corporation
InventorsSerafino Bueti, Adam Courchesne, Kenneth Goodnow, Gregory Mann, Jason Norman, Stanley Stanski, Scott Vento
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A system and method for verifying system-on-chip interconnect includes a first linear feedback shift register coupled to an output interface of a first system-on-chip component, a second linear feedback shift register instantiated in a second system-on-chip component, and a comparator coupled to the second linear feedback shift register and the input interface of the second system-on-chip. Another method for verifying includes generating a pseudo-random number sequence with the first linear feedback shift register and the second linear feedback shift register using an identical first initial state, and comparing an output of the first linear feedback shift register with an output of the second linear feedback shift register and reporting a miss-compare.
A system-on-chip interconnect verification circuit, comprising:
A method of verifying an interconnect between system-on-chip components on an integrated circuit, the method comprising:
A system for simulating system-on-chip interconnect verification, comprising:
Dependencies are inferred from the claim text.