Digital system and method for testing analogue and mixed-signal circuits or systems
AssigneeUniversity of Strathclyde
InventorsDavid Hamilton, Brian Stimpson, Mahmoud Bekheit
Life of this patent
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Abstract
A method of optimising a digital test signal for testing an analogue or mixed-signal circuit comprising determining a measure, for example a figure of merit, that is indicative of differences between the output of a fault free and the output of a known faulty circuit in response to an applied digital input signal. The digital input signal is then varied and another figure of merit is calculated for the fault free and the known faulty circuit for the new input signal. This is repeated a number of times, the digital input signal being varied each time. An optimum test signal is selected based on the determined figures of merit.
Claims55
A method for improving digital testing of an analogue or mixed-signal circuit, the method comprising:
- inputting a digitized input test sequence to a fault free version of the analogue or mixed signal circuit or computer simulation thereof;
- inputting the same digitized input test sequence to a version of the circuit or computer simulation thereof that has at least one specified fault,
- using an optimization algorithm to vary the input test sequence;
- monitoring the outputs of the fault free and faulty circuits for each test sequence;
- and
- identifying an optimized digitized input test sequence, wherein the optimized digitized input test sequence is used to identify a corresponding digitized output for use in a test mode.
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A digitized input test sequence or a copy thereof for testing analogue or mixed signal circuits that is a product of:
- inputting a digitized input test sequence to a fault free version of the analogue or mixed signal circuit or computer simulation thereof;
- inputting the same digitized input test sequence to a version of the circuit or computer simulation thereof that has at least one specified fault,
- using an optimization algorithm to vary the input test sequence;
- monitoring the outputs of the fault free and faulty circuits for each test sequence;
- and
- identifying an optimized digitized input test sequence, wherein the optimized digitized input test sequence is used to identify a corresponding digitized output for use in a test mode.
A system for improving digital testing of an analogue or mixed-signal circuit, the system being configured to:
- input a digitized input test sequence to a fault free version of the analogue or mixed signal circuit or computer simulation thereof;
- input the same digitized input test sequence to a version of the circuit that has at least one specified fault;
- use an optimization algorithm to vary the input test sequence;
- monitor the outputs of the fault free and faulty circuits for each test sequence and identify a digitized input sequence, wherein the digitized input is used to identify a corresponding digitized output for use in a test mode.
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A computer program for improving testing of an analogue or mixed-signal circuit using a digitized input test sequence, the computer program being provided on a data carrier or computer readable medium and having code or instructions for:
- inputting a digitized input test sequence to a fault free version of the analogue or mixed signal circuit or computer simulation thereof;
- inputting the same digitized input test sequence to a version of the circuit that has at least one specified fault;
- using an optimization algorithm to vary the input test sequence;
- monitoring the outputs of the fault free and faulty circuits for each digitized input test sequence;
- and
- identifying a digitized input sequence, wherein the digitized input is used to identify a corresponding digitized output for use in a test mode.
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Dependencies are inferred from the claim text.