US 2006/0242492 A1 · Method and apparatus for masking known fails during memory tests readouts

Abstract

Embodiments of the present invention generally provide methods and apparatus for testing memory devices having normal memory elements and redundant memory elements. During a front-end testing procedure, normal memory elements that are found to be defective are replaced by redundant memory elements. During the front-end test, redundant memory elements that are found to be defective may be marked as defective by blowing associated mask fuses. During a back-end testing procedure, the results of testing a normal memory element may be masked (e.g., forced to a passing result) if the normal memory element has been replaced by a redundant memory element. Similarly, the results of testing a redundant memory element may be masked if the redundant memory element was previously found to be defective, as indicated by an associated mark fuse. By masking the test results for memory elements (normal and redundant) that have been previously found defective, the memory elements may be tested in the same manner during front-end and back-end testing.

Claims13

Dependent claims

A memory device comprising:

an array of normal memory elements;
a plurality of redundant memory elements;
a redundant selection circuit, programmable to select a non-defective redundant memory element in response to detecting an address of a defective normal memory element;
and
a plurality of mask fuses, each to indicate an associated one of the redundant memory elements is defective.

2 more elements

A method of testing a semiconductor memory device having a plurality of normal memory elements and a plurality of redundant memory elements, comprising:

performing a front-end test comprising:
determining which of the normal memory elements and redundant memory elements are defective;
replacing defective normal memory elements with non-defective redundant memory elements;
and
blowing mask fuses to indicate which of the redundant elements are defective;
and
performing a back-end test comprising, for each normal memory element:
writing reference data to the normal memory element;
reading stored data from the normal memory element;
comparing the stored data read from the normal memory element to the reference data;
generating a pass result regardless of the results of the comparison if the normal memory element has been replaced by a redundant element;
and
generating a pass result only if the stored data matches the reference data if the normal memory device has not been replaced by a redundant element.

10 more elements

Dependencies are inferred from the claim text.

Method and apparatus for masking known fails during memory tests readouts

Life of this patent

Method and apparatus for masking known fails during memory tests readouts

Life of this patent

Abstract

Claims13