Error detection, documentation, and correction in a flash memory device
AssigneeMicron Technology, Inc.
InventorFrankie Roohparvar
Life of this patent
Estimating the term…
Abstract
A memory device has an error documentation memory array that is separate from the primary memory array. The error documentation memory array stores data relating to over-programmed bits in the primary array. When the over-programmed bits in the primary array are erased, the error documentation memory array is erased as well, deleting the documentation data relating to the over-programmed bits.
Claims20
A method for error detection, documentation, and correction in a memory device, the method comprising:
- detecting a first memory cell that is over-programmed;
- programming the first memory cell to a next possible state, a difference between a desired state and the next possible state being an offset;
- storing a location for the first memory cell into an error documentation memory array;
- and
- storing the offset in the error documentation memory array.
A method for error detection, documentation, and correction in a flash memory device, the method comprising:
- receiving I/O data to be programmed into a first memory cell associated with a first memory address;
- detecting that the first memory cell is over-programmed;
- storing the I/O data in an error documentation memory array;
- and
- storing an indication of the first memory address in the error documentation memory array such that it is associated with the I/O data.
A method for error detection, documentation, and correction in a flash memory device comprising a primary memory array, the method comprising:
- determining that a first cell of the primary memory array is over-programmed;
- storing, in an error documentation array, an indication that the first cell is over-programmed;
- and
- erasing both the error documentation array and at least a portion of the primary memory array comprising the first cell.
Dependencies are inferred from the claim text.