Memory block quality identification in a memory device
AssigneeMicron Technology, Inc.
InventorFrankie Roohparvar
Life of this patent
Estimating the term…
Abstract
If a memory block in a flash memory device is found to have a defect, a memory block quality indication is generated in response to the type of memory defect. This indication is stored in the memory device. In one embodiment, the quality indication is stored in a predetermined location of the defective memory block. Using the quality indication, it can be determined if a system's error correction code scheme is capable of correcting data errors resulting from the defect.
Claims24
A method for generating a memory block quality indication in a memory device comprising a plurality of memory blocks, the method comprising:
- determining a first memory block, of the plurality of memory blocks, that comprises a memory defect;
- and
- generating the memory block quality indication in response to the memory defect.
A method for generating a memory block quality indication in a flash memory device comprising a plurality of memory blocks, the method comprising:
- performing a memory check on at least one memory block of the plurality of memory blocks;
- determining, in response to the memory check, which of the plurality of memory blocks comprise a memory defect;
- and
- generating the memory block quality indication in response to each memory defect.
A method for implementing a memory block quality indication of a memory block in a memory system having an error correction code scheme, the method comprising:
- reading the memory block quality indication;
- and
- determining, in response to the error correction code scheme and the memory block quality indication, if the first memory block is usable.
A flash memory device comprising:
- a memory array comprising a plurality of memory blocks;
- and
- a memory control circuit, coupled to the plurality of memory blocks, for generating a memory block quality indication code, the control circuit adapted to perform a memory check on at least one of the plurality of memory blocks and generate the memory block quality indication code in response to the memory check.
A memory system comprising:
- a processor for generating memory signals;
- and
- a flash memory device coupled to the processor and operating in response to the memory signals, the device comprising:
- a memory array comprising a plurality of memory blocks;
- and
- a memory control circuit, coupled to the plurality of memory blocks, for generating a memory block quality indication code, the control circuit adapted to perform a memory check on at least one of the plurality of memory blocks and generate the memory block quality indication code in response to the memory check.
Dependencies are inferred from the claim text.