Monitoring error-handler vector in architected memory
AssigneeHewlett-Packard Development Company, L.P.
InventorsKevin Vadnais, Dale McCluskey
Life of this patent
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Abstract
A computer system provides a vector monitor for monitoring a first instance of an error-handling vector in architected memory. The monitoring can involve repeatedly comparing the first instance with a second instance of the vector so as to detect a mismatch, should it occur. If a mismatch is detected, the vector monitor can notify an administrator, automatically initiate diagnostic routines, and/or correct the mismatch. As a result, potential fatal events in which firmware confronts a corrupted error-handling vector are less likely to occur.
Claims15
A system comprising:
- a processor;
- firmware;
- computer readable media including
- an error handling routine
- a vector pointing to said error handling routine, said vector being accessible to said firmware;
- a copy of said vector;
- and
- a vector monitor for detecting a mismatch between said vector and said copy, said vector monitor having access to said vector and said copy.
A method comprising:
- repeatedly comparing a firmware-accessible error-handling vector with a first copy of said vector;
- and
- detecting when there is a mismatch between said vector and said first copy.
Computer readable media comprising a vector monitor that monitors a first instance of error-hander vector in architected memory by repeatedly comparing it to a second instance of said vector to detect a mismatch.
Dependencies are inferred from the claim text.