Method and system of copying a memory area between processor elements for lock-step execution

A system comprising:

• a first computer system comprising:
• a first processor element;
• a second processor element;
• and
• a memory;
• a second computer system coupled to the first computer system, the second computer system comprising:
• a first processor element;
• a second processor element;
• and
• a memory;
• wherein the first processor elements are configured to execute duplicate copies of a first program in lock-step;
• wherein the second processor element of the first computer system is configured to execute a second program;
• wherein a memory area of the second program in the second processor element of the first computer system is copied to the memory of a second computer system while the duplicate copies of the first program execute in the first processor elements;
• and
• wherein after the memory area is copied the second processor elements are configured to execute duplicate copies of the second program in lock-step.

A system comprising:

• a first computer system comprising:
• a first processor element coupled to a first portion of a memory by way of a logic device;
• a second processor element coupled to a second portion of the memory by way of the logic device;
• a second computer system coupled to the logic device;
• wherein the logic device selectively:
• couples the first processor element to the first portion of the memory, couples the second processor element to the second portion of the memory of the first computer system, and duplicates memory writes between the second processor element and second portion and sends the duplicate memory writes to the second computer system;
• or
• couples the first processor element to the first portion of the memory, couples the second processor element to the second portion of the memory, and duplicates memory writes between the first processor element and first portion of the memory and sends the duplicate memory writes to the second computer system.

A logic device comprising:

• a first and second processor communication ports that couple to respective processor elements;
• a first and second memory communications ports that couple to memory a duplicate memory write input port that couples to a stream of duplicate memory writes;
• and
• a duplicate memory write output port;
• wherein the logic device selectively:
• couples the first processor communication port to the first memory communication port, couples the second processor communication port to the second memory communication port, and duplicates memory writes between the second processor communication port and second memory port and sends the duplicate memory writes out the memory write output port;
• or
• couples the first processor communication port to the first memory communication port, couples the second processor communication port to the second memory communication port, and duplicates memory writes between the first processor communication port and first memory port and sends the duplicate memory writes out the memory write output port.

A system comprising:

• a first system means for executing programs comprising a first and second processor means;
• a second system means for executing programs comprising a first and second processor means;
• wherein the first processors means execute duplicate copies of a first program in lock-step;
• wherein the second processor means of the first computer systems executes a second program;
• wherein a memory area of the second program that executes in the second processor means of the first computer system is copied to a memory area of the second system means while the duplicate copies of the first program execute in the first processor means;
• and
• wherein after the memory area is copied the second processor means execute duplicate copies of the second program in lock-step.