Computer volatile memory power backup system
OwnerDaniel Feldman, Arkadiy Peker +3inventors
InventorsDaniel Feldman, Arkadiy Peker, Dror Korcharz, Simon Kahn, Mohamad Salem
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Abstract
A system for backing up a computer in the event of a mains power failure, the system comprising: sensing means operative to sense a failure of mains power; means for receiving power over data communication cabling; a volatile memory; means for feeding power from the means for receiving power to the volatile memory; and an interrupt generating means for generating an interrupt to a processor responsive to the sensing means, the processor being operative responsive to the generated interrupt to store status information on the volatile memory.
Claims105
A system for backing up a computer in the event of a mains power failure, said system comprising:
- sensing means operative to sense a failure of mains power;
- means for receiving power over data communication cabling;
- a volatile memory;
- means for feeding power from said means for receiving power to said volatile memory;
- and
- an interrupt generating means for generating an interrupt to a processor responsive to said sensing means, the processor being operative responsive to said generated interrupt to store status information on said volatile memory.
A system for backing up a computer in the event of a mains power failure, said system comprising:
- means for sensing a failure of mains power;
- means for receiving power over Ethernet;
- a volatile memory arranged to be powered via said received power in the event of said failure of mains power;
- a processor operative responsive to said means for sensing a failure to store status information on said volatile memory and reduce power demand of said processor and associated devices to be no more than that available from said means for receiving power.
A system for backing up a computer, said system comprising:
- power receiving means for receiving power over Ethernet;
- a memory arranged to be powered responsive to an output of said power receiving means;
- a processor comprising a power management interface;
- and
- at least one device associated with said processor,
- said processor and said at least one associated device having a variable power demand responsive to said power management interface,
- said processor being operative responsive to an input to store status information on said memory and reduce power demand of said processor and said at least one associated device via said power management interface to be no more than that available from said power receiving means.
A computer operable to maintain at least a portion of its context in the event of a mains power failure, said computer comprising:
- a processor;
- a power supply receiving a filtered and rectified AC mains power and exhibiting a first plurality of outputs and a standby power line, said power supply receiving a control signal generated by said processor;
- a memory operably connected to said processor, said memory being arranged to be powered by said standby power line;
- a verification circuit operable to sense a failure of AC mains power;
- a splitter operable to supply power received over data communication cabling;
- a boost converter operable to boost a voltage component of said power supplied from said splitter to a voltage compatible with a said filtered and rectified AC mains power;
- and
- an interrupt generating means for generating an interrupt to a processor responsive to said verification circuit sensing said failure,
- said processor responsive to said generated interrupt being operative to store status information of said processor on said memory, said processor being further operative to generate said control signal to said power supply,
- said power supply disabling power to said first plurality of outputs responsive to said control input.
A computer operable to maintain at least a portion of its context in the event of a mains power failure, said computer comprising:
- a processor;
- a power supply receiving a filtered and rectified AC mains power and exhibiting a first plurality of outputs and a standby power line;
- a memory operably connected to said processor, said memory being powered by said standby power line;
- a verification circuit operable to sense a failure of AC mains power;
- a power over Ethernet circuit operable to supply power received over data communication cabling;
- a boost converter operable to boost a voltage component of said supplied power received over data communication cabling to a voltage compatible with said filtered and rectified AC mains power;
- and
- an interrupt generating means for generating an interrupt to a processor responsive to said verification circuit sensing said failure,
- said processor responsive to said interrupt being operative to store status information of said processor on said memory,
- said processor being further operative to generate control signals reducing power consumption of connected devices such that power consumption is less than or equal to power available from said boost converter.
A computer operable to maintain at least a portion of its context in the event of a mains power failure, said computer comprising:
- a processor;
- a memory operably connected to said processor;
- a verification circuit operable to sense a failure of AC mains power;
- a power over Ethernet circuit operable to supply power received over data communication cabling;
- a power supply receiving power from said power over Ethernet circuit, said power supply supplying power to said memory;
- and
- an interrupt generating means for generating an interrupt to said processor responsive to said verification circuit sensing said failure,
- said processor responsive to said interrupt being operative to store status information of said processor on said memory within 17 milliseconds of said interrupt.
A method for backing up a computer in the event of a mains power failure, the method comprising:
- receiving power over data communication cabling;
- sensing a failure of mains power;
- interrupting a processor responsive to said sensing;
- storing status information of the processor on a volatile memory;
- and
- supplying said received power to the volatile memory.
A system for backing up a computer in the event of a mains power failure, said system comprising:
- an AC verification circuit operable to sense a failure of mains power;
- a power over Ethernet receiving circuit operable to receive power over data communication cabling;
- a volatile memory;
- a power feeding circuit operable to power to said volatile memory;
- and
- an interrupt generator operable to interrupt a processor responsive to said power verification circuit, the processor being operative responsive to said generated interrupt to store status information on said volatile memory.
Dependencies are inferred from the claim text.