Circuit including a deskew circuit

An electronic system, comprising:

• a random access memory including an input/output circuit comprising:
• a first circuit configured to receive a first data signal having a first edge and a second edge and to provide a second data signal having a third edge delayed from the first edge by a first delay and a fourth edge delayed from the second edge by a second delay;
• and
• a second circuit configured to receive the second data signal and to provide a third data signal having a first deskewed edge delayed from the third edge by a third delay and a second deskewed edge delayed from the fourth edge by a fourth delay, wherein the first delay plus the third delay is substantially equal to the second delay plus the fourth delay.

A circuit, comprising:

• a first circuit configured to receive a first signal having a first edge and a second edge and to provide a second signal having a first rising edge delayed from the first edge by a first delay and a first falling edge delayed from the second edge by a second delay;
• and
• a second circuit configured to receive the second signal and to provide a third signal having a second rising edge delayed from the first rising edge by a third delay and a second falling edge delayed from the first falling edge by a fourth delay, wherein the second circuit comprises:
• a third circuit configured to receive the second signal and delay the first rising edge to provide the second rising edge in a first delayed signal;
• a fourth circuit configured to receive the second signal and delay the first falling edge to provide the second falling edge in a second delayed signal;
• and
• a fifth circuit configured to combine the first delayed signal and the second delayed signal to provide the third signal, wherein the difference between the fourth delay and the third delay is substantially equal to the difference between the first delay and the second delay.

A circuit comprising:

• means for receiving a first signal having a first edge delayed from a second edge of a second signal, and a third edge delayed from a fourth edge of the second signal;
• means for delaying the first edge to provide a first deskewed edge that is delayed a deskewed delay from the second edge;
• and
• means for delaying the third edge to provide a second deskewed edge that is delayed the deskewed delay from the fourth edge.

A method for recovering data in a random access memory, comprising:

• receiving a first data signal having a first edge and a second edge at a first circuit;
• delaying the first edge by a first delay to provide a third edge in a second data signal;
• delaying the second edge by a second delay to provide a fourth edge in the second data signal;
• receiving the second data signal at a second circuit;
• delaying the third edge by a third delay to provide a first deskewed edge in a third data signal;
• and
• delaying the fourth edge by a fourth delay to provide a second deskewed edge in the third signal, wherein the first delay plus the third delay is substantially, equal to the second delay plus the fourth delay.

A method for deskewing, comprising:

• receiving a first signal having a first edge and a second edge at a first circuit;
• delaying the first edge by a first delay to provide a first rising edge in a second signal;
• delaying the second edge by a second delay to provide a first falling edge in the second signal;
• receiving the second signal at a second circuit;
• delaying the first rising edge by a third delay in a third circuit to provide a second rising edge in a first delayed signal;
• delaying the first falling edge by a fourth delay in a fourth circuit to provide a second falling edge in a second delayed signal;
• and
• combining the first delayed signal and the second delayed signal to provide a third signal, wherein the difference between the fourth delay and the third delay is substantially equal to the difference between the first delay and the second delay.