Processor, compiler and compilation method

A compiler for converting a source code of a program notated in a high-level language into an object code, comprising:

• an assembler code generating means for generating, from the source code, an assembler code sequence including a plurality of assembler codes, each of the plurality of assembler codes having an execution condition field designating a register to be accessed and a parallel execution boundary field designating an assembler code group including at least one assembler code of the plurality of assembler codes to be executed in parallel;
• an instruction scheduling means for modifying the assembler code sequence to include a first assembler code group including at least two assembler codes to be executed in parallel to set a value on a parallel execution boundary field of an assembler code included in the first assembler code group therein, the first assembler code group including a first assembler code and a second assembler code such that a value determined in response to a flag stored in a register designated by an execution condition field of the first assembler code designates one of true or false and a value determined in response to a flag stored in a register designated by an execution condition field of the second assembler code designates the other one of true or false, where the number of assembler codes included in the first assembler code group is greater than the number of at least one executing unit included in a target processor;
• and
• an object code generating means for converting the modified assembler code sequence modified by the instruction scheduling means to the object code.

A compiler for converting a source code of a program notated in a high-level language into an object code, comprising:

• an assembler code generating means for generating, from the source code, an assembler code sequence including a plurality of assembler codes, each of the plurality of assembler codes having an execution condition field designating a register to be accessed and a parallel execution boundary field designating an assembler code group including at least one assembler code of the plurality of assembler codes to be executed in parallel;
• an instruction scheduling means for modifying the assembler code sequence to include a first assembler code group including at least two assembler codes to be executed in parallel to set a value on a parallel execution boundary field of an instruction included in the first assembler code group, each of at least one value determined in response to at least one flag stored in at least one register designated by at least two execution condition fields of the at least two assembler codes simultaneously designating either true or false, and the at least two assembler codes can be replaced to a compound assembler code, where the number of assembler codes included in the first assembler code group is greater than the number of at least one executing unit included in a target processor;
• and
• an object code generating means for converting the modified assembler code sequence modified by the instruction scheduling means to the object code.

A compilation method for converting a source code of a program notated in a high-level language into an object code, comprising the steps of:

• an assembler generating step for generating, from the source code, an assembler code sequence including a plurality of assembler codes, each of the plurality of assembler codes having an execution condition field designating a register to be accessed and a parallel execution boundary field designating an assembler code group including at least one assembler code of the plurality of assembler codes to be executed in parallel;
• an instruction scheduling step for modifying the assembler code sequence to include a first assembler code group including at least two assembler codes to be executed in parallel to set a value on a parallel execution boundary field of an assembler code included in the first assembler code group, the first assembler code group including a first assembler code and a second assembler code such that a value determined in response to a flag stored in a register designated by an execution condition field of the first assembler code designates one of true or false and a value determined in response to a flag stored in a register designated by an execution condition field of the second assembler code designate the other one of true or false, where the number of assembler codes included in the first assembler code group is greater than the number of at least one executing unit included in a target processor;
• and
• an object code generating step for converting the modified assembler code sequence modified by the instruction scheduling means to the object code.

A compilation method for converting a source code of a program notated in a high-level language into an object code, comprising the steps of:

• an assembler generating step for generating, from the source code, an assembler code sequence including a plurality of assembler codes, each of the plurality of assembler codes having an execution condition field designating a register to be accessed and a parallel execution boundary field designating an assembler code group including at least one assembler code of the plurality of assembler codes to be executed in parallel;
• an instruction scheduling step for modifying the assembler code sequence to include a first assembler code group including at least two assembler codes to be executed in parallel to set a value on a parallel execution boundary field of an instruction included in the first assembler code group, each of at least one value determined in response to at least one flag stored in at least one register designated by at least two execution condition fields of the at least two assembler codes simultaneously designating either true or false, and the at least two assembler codes can be replaced to a compound assembler code, where the number of assembler codes in the first assembler code group is greater than the number of at least one executing unit included in a target processor;
• and
• an object code generating step for converting the modified assembler code sequence modified by the instruction scheduling means to the object code.