Microprocessor systems and bus address translation methods
AssigneeMediatek Incorporation
InventorsWei-Jen Chen, Shih-Hung Lin, Yao-Huang Hsieh
Life of this patent
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Abstract
A microprocessor system contains a read-only memory (ROM) for storing programs or firmware. Retrieval and execution of program code is controlled by a microprocessor address bus. Erroneous data in the ROM can be corrected by address comparison and translation. Trap, region, and patch tables are provided to store addresses, regions, and translated addresses. An address issued by the microprocessor is stored in the trap and region tables can be translated for selecting another programmable device, such as a SRAM or DRAM, other than the original ROM. Thus, erroneous code in the ROM can be corrected, inserted, or replaced.
Claims32
A microprocessor system, comprising:
- a microprocessor, issuing a first address to a first address bus;
- and
- a trap controller, coupled to the first address bus, comprising a trap table and a patch table, fetching the first address from the first address bus, translating the first address to a second address according to the trap and patch tables, and issuing the second address to a second address bus.
A bus address translation method, comprising:
- fetching a first address from a first address bus;
- translating the first address to a second address according to a trap table and a patch table;
- and
- issuing the second address to a second address bus.
A program patching method using bus address translation, comprising:
- initializing a trap table and a patch table;
- comparing a first address with records in the trap table to acquire a comparison result;
- fetching a patch record from the patch table, wherein the patch record indicates a second address;
- fetching second code according to the second address;
- and
- fetching first code according to the first address if the comparison result is not matched.
Dependencies are inferred from the claim text.