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US 2006/0242336 A1Published application
Alignment of instructions and replies across multiple devices in a cascaded system, using buffers of programmable depths
OwnerTom Tenginventor
Life of this patent
Estimating the term…
Abstract
Buffers of programmable depths are used in the instruction and reply paths of cascaded devices to account for possible differences in latencies between the devices. The buffers may be enabled or bypassed such that the alignment of instruction and result may be performed at the boundaries between separate groups of devices having different instruction latencies.
Claims15
1-33. (canceled)
A processor system, comprising:
- a first device having a first input for receiving a request signal, a second input for receiving a first reply signal, a first output for outputting said request signal, and a second output for outputting a second reply signal, said second reply signal being generated from operations performed in response to said request signal and from said first reply signal;
- at least one buffer coupled to said first device for receiving and outputting at least one of said outputted request signal and said second reply signal, said at least one buffer having an associated latency;
- and
- a second device coupled to receive said outputted request signal and said second reply signal from said at least one buffer, said at least one buffer being configured to substantially equate a latency of said first device with a latency of said second device.
1 more element
A processor system, comprising:
- a first device having a first latency;
- a second device having a second latency different from said first latency;
- and
- at least one buffer coupled between outputs of said first device and inputs of said second device, said at least one buffer being programmed to transfer signals on the outputs to the inputs by substantially equating said first and said second latencies.
1 more element
47-62. (canceled)
Dependencies are inferred from the claim text.