Digital system, clock signal adjusting method for digital system, recording medium recording processing program executed in the adjusting method

A digital system that carries out digital processing in accordance with a single or a plurality of digital clock signals to perform a prescribed basic function,

• characterized in that the digital system comprises
• a plurality of delay elements provided therein, each comprising a circuit element that changes a delay time according to a value indicated by a control signal and is inserted in each of a plurality of clock circuits that supply the clock signals,
• a plurality of holding circuits that hold a plurality of control signals applied to the plurality of delay elements,
• setting means that in a state in which the digital system is supplied with power from a variable output voltage power supply apparatus, changes values of the plurality of control signals held by the plurality of holding circuits in accordance with a probabilistic search technique so that a basic function of the digital system satisfies prescribed specifications.

A method of adjusting clock signal timing of a digital system that carries out digital processing in accordance with a single or a plurality of digital clock signals to perform a prescribed basic function, comprising:

• inserting each of a plurality of delay elements into each of a plurality of clock circuits that supply the clock signals in the digital system,
• constituting each of the plurality of delay elements by a circuit element that changes a delay time according to a value indicated by a control signal, and
• holding a plurality of control signals applied to the plurality of delay elements in a plurality of holding circuits provided in the digital system, and
• characterized in that in a state in which the digital system is supplied with power from a variable output voltage power supply apparatus, values of the plurality of control signals held by the plurality of holding circuits are changed by an external apparatus in accordance with a probabilistic search technique so that a basic function of the digital system satisfies prescribed specifications.

A method of adjusting clock signal timing of a digital system that carries out digital processing in accordance with a single or a plurality of digital clock signals to perform a prescribed basic function, comprising:

• inserting each of a plurality of delay elements into a plurality of clock circuits that supply the clock signals in the digital system,
• constituting each of the plurality of delay elements by a circuit element that changes a delay time according to a value indicated by a control signal, and
• holding a plurality of control signals applied to the plurality of delay elements in a plurality of holding circuits provided in the digital system, and
• characterized in that in a state in which the digital system is supplied with power from a variable output voltage power supply apparatus, values of the plurality of control signals held by the plurality of holding circuits are changed by a setting apparatus provided in the digital system in accordance with a probabilistic search technique so that a basic function of the digital system satisfies prescribed specifications.