Method, system, and apparatus to support device configuration

An apparatus to allow a core of a multi-core processor to be represented as a virtual device comprising:

• a configuration space header with a field designated as a capability pointer;
• and
• a mapped configuration address to refer a memory mapped address for the configuration space of the virtual device;
• and
• a bridge device with the functionality of a PCI bridge device, incorporated within an IOH, and an ability to direct configuration accesses to a memory image of the virtual device.

An apparatus to define a PCI hierarchy to represent a core as a virtual device comprising:

• a bridge device to define a plurality of virtual devices coupled to virtual busses, the bridge device is coupled to a primary PCI bus that is connected to actual discrete computing devices;
• the bridge device with the functionality of a PCI bridge device, incorporated within an IOH, and an ability to direct configuration accesses to a memory image of the virtual device;
• and
• the virtual devices that are defined by the bridge device do not exist in a computing system, nonetheless, a respective configuration space for the virtual devices do exist.

An apparatus to define a PCI hierarchy to represent a core as a virtual device comprising:

• a bridge device to define a plurality of virtual devices coupled to virtual busses, the bridge device is coupled to a primary PCI bus that is connected to actual discrete computing devices;
• the bridge device with the functionality of a PCI bridge device, incorporated within an IOH, and an ability to direct configuration accesses to a memory image of the virtual device;
• the virtual devices that are defined by the bridge device do not exist in a computing system, nonetheless, a respective configuration space for the virtual devices do exist;
• and
• wherein the bridge device utilizes a PCI configuration header with a capability point, to direct configuration accesses to a memory image of the virtual device

An article of manufacture comprising:

• a machine-readable medium having a plurality of machine readable instructions, wherein when the instructions are executed by a system, the instructions provide to allow a core of a multi-core processor to be represented as a virtual for:
• initializing a memory space and a bridge device, the bridge device has a functionality of a PCI bridge device, and an ability to direct configuration accesses to a memory image of the virtual device;
• supporting a capability pointer in a PCI configuration space header;
• and
• setting an interrupt capability for the multi-core processor.

An article of manufacture comprising:

• a machine-readable medium having a plurality of machine readable instructions, wherein when the instructions are executed by a system, the instructions provide to allow a core of a multi-core processor to be represented as a virtual for:
• initializing a memory space and a bridge device, the bridge device has a functionality of a PCI bridge device, and an ability to direct configuration accesses to a memory image of the virtual device;
• and
• supporting a capability pointer in a PCI configuration space header.

A system to support at least one multi-core processor comprising:

• a dynamic random access memory, coupled to the multi-core processor;
• and
• a bridge device to define a plurality of virtual devices coupled to virtual busses, the bridge device is coupled to a primary PCI bus that is connected to actual discrete computing devices;
• the bridge device with the functionality of a PCI bridge device, incorporated within an IOH, and an ability to direct configuration accesses to a memory image of the virtual device;
• the virtual devices that are defined by the bridge device do not exist in a computing system, nonetheless, a respective configuration space for the virtual devices do exist;
• and
• wherein the bridge device utilizes a PCI configuration header with a capability point, to direct configuration accesses to a memory image of the virtual device.