Memory controller, image processing controller, and electronic instrument

A memory controller for allowing first to Nth (N is an integer of two or more) functional modules to access a memory, the memory controller comprising:

• first to Mth (1<M≦N, M is an integer) data transfer control sections each of which issues a data transfer request for the memory corresponding to an access request supplied to the data transfer control section;
• a crossbar switch section which supplies an access request from one of the first to Nth functional modules to one of the first to Mth data transfer control sections;
• an arbiter which arbitrates between the data transfer requests from the first to Mth data transfer control sections;
• and
• a memory interface which accesses the memory based on the data transfer request from one of the first to Mth data transfer control sections permitted as a result of arbitration by the arbiter;
• each of the data transfer control sections generating an access address of the memory based on the access request supplied to the data transfer control section, and controlling reading of data from the memory or writing of data into the memory using the access address when the data transfer request for the memory has been permitted as a result of arbitration by the arbiter.