Method of forming semiconductor device having stacked transistors
AssigneeSamsung Electronics Co., Ltd.
InventorsHyun-Su Kim, Gil-Heyun Choi, Jong-Ho Yun, Sug-Woo Jung, Eun-Ji Jung
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Abstract
There is provided a method of forming a semiconductor device having stacked transistors. When forming a contact hole for connecting the stacked transistors to each other, ohmic layers on the bottom and the sidewall of the common contact hole are separately formed. As a result, the respective ohmic layers are optimally formed to meet requirements or conditions. Accordingly, the contact resistance of the common contact may be minimized so that it is possible to enhance the speed of the semiconductor device.
Claims20
A method of forming a semiconductor device, the method comprising:
- forming a plurality of interlayer insulating layers and a semiconductor single crystalline layer interposed therebetween, on a semiconductor substrate;
- forming a common contact hole to expose the semiconductor substrate by patterning the plurality of interlayer insulating layers and the semiconductor single crystalline layer;
- forming a first ohmic layer to cover a sidewall of the semiconductor single crystalline layer which is exposed by the common contact hole;
- forming a second ohmic layer on at least a portion of the semiconductor substrate which is exposed by the common contact hole;
- and
- forming a common contact plug in the common contact hole.
A method of forming a semiconductor device, the method comprising:
- forming a lower transistor on a semiconductor substrate;
- forming a lower interlayer insulating layer on the lower transistor;
- forming an upper transistor and an upper interlayer insulating layer covering the upper transistor, on the lower interlayer insulating layer;
- forming a common contact hole to expose source/drain regions of the lower transistor by patterning the upper interlayer insulating layer, source/drain regions of the upper transistor, and the lower interlayer insulating layer;
- forming a blocking layer to cover the bottom of the common contact hole but to expose the source/drain regions of the upper transistor;
- forming a first ohmic layer on the exposed source/drain regions of the upper transistor;
- exposing the source/drain regions of the lower transistor by removing the blocking layer disposed on the bottom of the common contact hole;
- forming a second ohmic layer on the exposed source/drain regions of the lower transistor;
- and
- forming a common contact plug in the common contact hole.
A method of forming a semiconductor device, the method comprising:
- forming a first transistor including a first gate pattern and a first source/drain region on both sides of the first gate pattern, over a semiconductor substrate, wherein the first source/drain region is disposed in the semiconductor substrate;
- forming a first interlayer insulating layer to cover the first transistor;
- forming a first epitaxial contact plug in contact with the first source/drain region through the first interlayer insulating layer;
- forming a first semiconductor single crystalline layer on the first interlayer insulating layer, wherein the first semiconductor single crystalline layer is in contact with the first epitaxial contact plug;
- forming a second transistor including a second gate pattern and a second source/drain region on both sides of the second gate pattern, over the first semiconductor single crystalline layer, wherein the second source/drain region is disposed in the first semiconductor single crystalline layer;
- forming a second interlayer insulating layer to cover the second transistor;
- forming a common contact hole to expose the semiconductor substrate by patterning the second interlayer insulating layer, the first semiconductor single crystalline layer, and the first epitaxial contact plug;
- forming a blocking layer to cover the bottom of the common contact hole but to expose the sidewall of the first semiconductor single crystalline layer;
- forming a first ohmic layer to cover the sidewall of the first semiconductor single crystalline layer;
- removing the blocking layer;
- forming a second ohmic layer on the semiconductor substrate on the bottom of the common contact hole;
- and
- forming a common contact plug to fill the common contact hole.
Dependencies are inferred from the claim text.