Non-volatile memory device and method of fabricating the same
AssigneeSamsung Electroncis Co., Ltd.
InventorTae-kwang Yoo
Life of this patent
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Abstract
A method of fabricating an a non-volatile memory includes forming trench isolation regions in an inactive region of a semiconductor substrate, adjacent trench isolation regions defining respective protrusions having rounded edges therebetween, wherein upper surfaces of the trench isolation regions are lower than an upper surface of the semiconductor substrate and wherein the protrusions define an active region, forming a tunnel insulating layer covering the protrusion of the semiconductor substrate, and forming, sequentially, a storage layer, a blocking insulating layer, and a gate layer covering the tunnel insulating layer.
Claims22
A method of fabricating an a non-volatile memory, comprising:
- defining an active region and an inactive region in a semiconductor substrate;
- forming trench isolation regions in the inactive region for increasing an area of the active region from an upper surface of a protrusion of the semiconductor substrate between the trench isolation regions to a side of the protrusion, wherein upper surfaces of the trench isolation regions are lower than an upper surface of the semiconductor substrate;
- forming a tunnel insulating layer on the protrusion of the semiconductor substrate, including the side of the protrusion;
- forming, sequentially, a storage layer, a blocking insulating layer, and a gate layer on the tunnel insulating layer;
- and
- rounding angular edges of the protrusion after increasing the area of the active region, wherein the edges formed between the trench isolation regions and the protrusions remain angular.
A method of fabricating an a non-volatile memory, comprising:
- forming trench isolation regions in an inactive region of a semiconductor substrate, adjacent trench isolation regions defining respective protrusions having rounded edges therebetween, wherein upper surfaces of the trench isolation regions are lower than an upper surface of the semiconductor substrate and wherein the protrusions define an active region;
- forming a tunnel insulating layer covering the protrusion of the semiconductor substrate;
- and
- forming, sequentially, a storage layer, a blocking insulating layer, and a gate layer covering the tunnel insulating layer.
Dependencies are inferred from the claim text.