Structures and methods for forming a locally strained transistor

A method of forming a semiconductor device comprising:

• forming a gate electrode on a substrate;
• forming a lightly doped source/drain (LDS/LDD) region in the substrate by a first ion implantation using the gate electrode as a mask, wherein the first ion implantation includes a stressor and one of an N-type and a P-type dopant;
• forming sidewall spacers on opposite sidewalls of the gate electrode;
• forming a heavily doped source/drain region in the substrate by a second ion implantation using the gate electrode and the sidewall spacers as a mask, wherein the second ion implantation includes the stressor and one of the N-type and the P-type dopant;
• and
• annealing the semiconductor device to react the stressor and the substrate, wherein a reaction product of the stressor and the substrate has a lattice spacing different from a substrate lattice spacing.

A method of creating a compressive strain in a PMOS transistor for improving carrier mobility, the method comprising:

• forming a gate electrode on a substrate;
• forming a lightly doped source/drain (LDS/LDD) region in the substrate by simultaneously implanting germanium and boron in the substrate using the gate electrode as a mask;
• forming spacers on opposite sidewalls of the gate electrode;
• forming a heavily doped source/drain region in the substrate by simultaneously implanting germanium and boron using the gate electrode and the spacers as a mask;
• and
• annealing the substrate to crystallize SiGe.