Methods of fabricating nonvolatile memory devices and related devices
AssigneeSamsung Electronics Co., Ltd.
InventorsJung-Dal Choi, Yun-Seung Shin, Jong-Sun Sel
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Abstract
Methods of fabricating nonvolatile memory devices are provided. An isolation layer is formed on a substrate. The substrate has a memory region and a well contact region and the isolation layer defines an active region of the substrate. A gate insulating layer is formed on the active region. The gate insulating layer is patterned to define an opening therein. The opening exposes at least a portion of the well contact region of the substrate and acts as a charge pathway for charges generated during a subsequent etch of the isolation layer. Related memory device are also provided.
Claims21
A method of fabricating nonvolatile memory device, the method comprising:
- forming an isolation layer on a substrate, the substrate having a memory region and a well contact region and the isolation layer defining an active region of the substrate;
- forming a gate insulating layer on the active region;
- and
- patterning the gate insulating layer to define an opening therein, the opening exposing at least a portion of the well contact region of the substrate and acting as a charge pathway for charges generated during a subsequent etch of the isolation layer.
A method of fabricating a nonvolatile memory device, the method comprising:
- forming a gate insulating layer on a substrate, the substrate having a memory region and a well contact region;
- patterning the gate insulating layer to define an opening therein, the opening exposing at least a portion of the well contact region of the substrate;
- forming a first conductive layer on the gate insulating layer;
- forming an isolation layer on the substrate, the isolation layer defining and active region;
- and
- selectively etching the isolation layer to expose at least a portion of a side surface of the first conductive layer.
A nonvolatile memory device comprising:
- a substrate;
- an integrated circuit substrate having a memory region and a well contact region;
- an isolation layer on the substrate that defines an active region of the substrate;
- and
- a gate insulating layer on the substrate, the gate insulating layer defining an opening therein, the opening exposing at least a portion of the well contact region of the substrate and acting as a charge pathway for charges generated during a subsequent etch of the isolation layer.
A nonvolatile memory device comprising:
- an integrated circuit substrate, the substrate having a memory region and a well contact region;
- a gate insulating layer on the substrate;
- and
- a gate electrode formed on the gate insulating layer, the gate electrode including a first conductive layer pattern, a dielectric layer pattern and a second conductive layer pattern sequentially stacked, wherein a concavity is formed on the substrate disposed on an outside of the stacked gate electrode.
Dependencies are inferred from the claim text.