Reproduction apparatus and method
AssigneeSony Corporation
InventorMorihiko Sato
Life of this patent
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Abstract
Reproduction signals which are simultaneously obtained from an Ach head 3 and a Bch head 4 are time division multiplexed by a signal layout converting circuit 9 and arranged. An HPF unit 12 and an LPF unit 14 of a waveform equalizing circuit 16 are optimally switched on the basis of sync adjustment information such as switching information of the heads. An edge detection pulse width of an edge detecting circuit and an output frequency of a VCO 23 are controlled on the basis of the sync adjustment information. The output frequency of the VCO 23 is used as a clock signal of the reproduction signals by a signal processing unit 27 at the post stage.
Claims6
A reproducing apparatus in which a first reproduction signal and a second reproduction signal are simultaneously obtained by a plurality of reading means from a disc-shaped recording medium on which data of a high-transfer rate and data of a low-transfer rate have been recorded, comprising:
- signal layout converting means for time division multiplexing said first reproduction signal and said second reproduction signal and arranging them;
- sync adjustment information forming means for forming sync adjustment information which is optimum to each reproduction signal from said first reproduction signal and said second reproduction signal;
- waveform equalizing means for executing a waveform equalizing process to an output of said signal layout converting means;
- switching means for switching characteristics of said waveform equalizing means in accordance with said sync adjustment information;
- and
- a PLL for generating a clock signal according to said sync adjustment information.
A reproducing method whereby a first reproduction signal and a second reproduction signal are simultaneously obtained by a plurality of reading means from a disc-shaped recording medium on which data of a high-transfer rate and data of a low-transfer rate have been recorded, comprising:
- a signal layout converting step of multiplexing said first reproduction signal and said second reproduction signal and arranging them;
- a sync adjustment information forming step of forming sync adjustment information which is optimum to each reproduction signal from said first reproduction signal and said second reproduction signal;
- a waveform equalizing step of executing a waveform equalizing process to an output of said signal layout converting means;
- and
- a step of switching characteristics of said waveform equalizing step in accordance with said sync adjustment information, inputting an output signal of said waveform equalizing step to a PLL, and generating a clock signal according to said sync adjustment information.
Dependencies are inferred from the claim text.