Non-volatile semiconductor memory device
AssigneesRenesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
InventorsMotoki Kanamori, Kunihiro Katayama, Atsushi Shiraishi, Shigeo Kurakata, Atsushi Shikata
Life of this patent
Estimating the term…
Abstract
When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.
Claims4
1-10. (canceled)
A non-volatile semiconductor memory device comprising:
- a plurality of non-volatile memory cells;
- a programming device which programs data to first cells in the plurality of non-volatile memory cells corresponding to a first address signal determining a programming address and received from outside of the non-volatile semiconductor memory device;
- and
- an error correction circuit reading stored data in the first cells after the program data have been programmed to the first cells and judging whether the stored data can be corrected to the program data when an error of the stored data is detected,
- wherein when the stored data can be corrected to the program data, the error correction circuit outputs a programming completion signal to the outside of the non-volatile semiconductor memory device, and
- wherein when the stored data cannot be corrected to the program data, the error correction circuit outputs a programming failure signal to the outside of the non-volatile semiconductor memory device and the non-volatile semiconductor memory device programs the inputted program data to second cells in the plurality of non-volatile memory cells corresponding to a second address signal determining a programming address and received from the outside of the non-volatile semiconductor memory device after receipt of the first address signal.
Dependencies are inferred from the claim text.