Estimation circuit for time-interleaved adc and method thereof
AssigneeRealtek Semiconductor Corp.
InventorsFong-Ching Huang, Chao-Cheng Lee
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Abstract
The present invention provides an apparatus and a method for estimating at least one of timing, gain, and offset errors of a time-interleaved ADC. The apparatus has a first ADC, a second ADC, a converter, an estimator, and a compensator. The converter has a Fourier Transform converter and a calculator.
Claims25
A method for estimating an error of a time-interleaved analog-to-digital converter (ADC), comprising:
- utilizing a first ADC of the time-interleaved ADC to sample an input signal with a sampling-frequency f0 to generate a first sampled data;
- utilizing a second ADC of the time-interleaved ADC to sample the input signal with the sampling-frequency f0 to generate a second sampled data;
- respectively converting the first and the second sampled data according to a frequency component of the input signal to generate a first complex number Z1 and a second Z2 complex number;
- and
- generating an estimated value of the error according to the first and the second complex numbers.
A method for estimating an error of a time-interleaved analog-to-digital converter (ADC), comprising:
- utilizing a first ADC of the time-interleaved ADC to sample an input signal with a sampling-frequency f0 to generate a plurality of first sampled data;
- utilizing a second ADC of the time-interleaved ADC to sample the input signal with the sampling-frequency f0 to generate a plurality of second sampled data;
- respectively averaging the plurality of first sampled data and the plurality of second sampled data to generate a first average value b1 and a second average value b2;
- and
- generating an estimated value of the error according to the first average value b1 and the second average value b2.
An apparatus for estimating an error of a time-interleaved analog-to-digital converter (ADC), comprising:
- a first ADC to sample an input signal with a sampling-frequency f0 to generate a first sampled data;
- a second ADC to sample the input signal with the sampling-frequency f0 to generate a second sampled data;
- a converter, coupled to the first and the second ADCs, to respectively convert the first and the second sampled data according to a frequency component of the input signal to generate a first complex number Z1 and a second Z2 complex number;
- and
- an estimator, coupled to the converter, to generate an estimated value of the error according to the first and the second complex numbers.
An apparatus for estimating an error of a time-interleaved analog-to-digital converter (ADC), comprising:
- a first ADC to sample an input signal with a sampling-frequency f0 to generate a plurality of first sampled data;
- a second ADC to sample the input signal with the sampling-frequency f0 to generate a plurality of second sampled data;
- a calculator, coupled to the first and the second ADCs, to respectively average the plurality of first sampled data and the plurality of second sampled data to generate a first average value b1 and a second average value b2;
- and
- an estimator, coupled to the calculator, to generate an offset error of the error according to the first average value b1 and the second average value b2.
Dependencies are inferred from the claim text.