Analogue multiplier
AssigneeAlcatel
InventorDetlef Rosener
Life of this patent
Estimating the term…
Abstract
An analogue multiplier circuit has an input coefficient voltage dependent adjustment of its frequency response. The multiplier contains a multiplier cell (MC) with an RF input (Vin+, Vin−) and a coefficient signal input (Vcoeff+, Vcoeff−), one or more capacitors (Cp1, Cp2) as peaking capacitors, which one contact connects to the multiplier cell (MC) and the other to a variable resistance (Mp1, Mp2), i.e. a MOS transistor, and a control circuit (CT) for controlling the variable resistance (Mp1, Mp2). The control circuit (CT) is connected to the coefficient signal input (Vcoeff+, Vcoeff−) of the multiplier. In the case of a four-quadrant multiplier a rectifier (RT) is connected between the coefficient input (Vcoeff+, Vcoeff−) of the multiplier and the control circuit (CT).
Claims8
An analogue multiplier circuit comprising a multiplier cell with an RF input and a coefficient signal input;
- at least one variable peaking filter connected to the multiplier cell;
- and a control circuit connected to the coefficient signal input of the multiplier for controlling the peaking filter in dependence of the input coefficient signal.
Dependencies are inferred from the claim text.